smmu_v3_transl.cc (14101:084b1cfa5d8e) | smmu_v3_transl.cc (14102:b0b52ccb7e1b) |
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1/* 2 * Copyright (c) 2013, 2018-2019 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 141 unchanged lines hidden (view full) --- 150 151 doSemaphoreDown(yield, ifc.slavePortSem); 152 doDelay(yield, Cycles(numSlaveBeats)); 153 doSemaphoreUp(ifc.slavePortSem); 154 155 156 recvTick = curTick(); 157 | 1/* 2 * Copyright (c) 2013, 2018-2019 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 141 unchanged lines hidden (view full) --- 150 151 doSemaphoreDown(yield, ifc.slavePortSem); 152 doDelay(yield, Cycles(numSlaveBeats)); 153 doSemaphoreUp(ifc.slavePortSem); 154 155 156 recvTick = curTick(); 157 |
158 159 if (!(smmu.regs.cr0 & 0x1)) { | 158 if (!(smmu.regs.cr0 & CR0_SMMUEN_MASK)) { |
160 // SMMU disabled 161 doDelay(yield, Cycles(1)); 162 completeTransaction(yield, bypass(request.addr)); 163 return; 164 } 165 166 TranslResult tr; 167 bool wasPrefetched = false; --- 1304 unchanged lines hidden --- | 159 // SMMU disabled 160 doDelay(yield, Cycles(1)); 161 completeTransaction(yield, bypass(request.addr)); 162 return; 163 } 164 165 TranslResult tr; 166 bool wasPrefetched = false; --- 1304 unchanged lines hidden --- |