1/* 2 * Copyright (c) 2013, 2018-2019 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 69 unchanged lines hidden (view full) --- 78 SMMUATSSlavePort atsSlavePort; 79 SMMUATSMasterPort atsMasterPort; 80 81 // in bytes 82 const unsigned portWidth; 83 84 unsigned wrBufSlotsRemaining; 85 unsigned xlateSlotsRemaining; |
86 unsigned pendingMemAccesses; |
87 88 const bool prefetchEnable; 89 const bool prefetchReserveLastWay; 90 91 std::list<SMMUTranslationProcess *> duplicateReqs; 92 SMMUSignal duplicateReqRemoved; 93 94 std::list<SMMUTranslationProcess *> dependentReads[SMMU_MAX_TRANS_ID]; --- 49 unchanged lines hidden --- |