smmu_v3.hh (14039:4991b2a345a1) smmu_v3.hh (14252:1659a606447f)
1/*
2 * Copyright (c) 2013, 2018-2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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50#include "dev/arm/smmu_v3_caches.hh"
51#include "dev/arm/smmu_v3_cmdexec.hh"
52#include "dev/arm/smmu_v3_defs.hh"
53#include "dev/arm/smmu_v3_events.hh"
54#include "dev/arm/smmu_v3_ports.hh"
55#include "dev/arm/smmu_v3_proc.hh"
56#include "dev/arm/smmu_v3_ptops.hh"
57#include "dev/arm/smmu_v3_slaveifc.hh"
1/*
2 * Copyright (c) 2013, 2018-2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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50#include "dev/arm/smmu_v3_caches.hh"
51#include "dev/arm/smmu_v3_cmdexec.hh"
52#include "dev/arm/smmu_v3_defs.hh"
53#include "dev/arm/smmu_v3_events.hh"
54#include "dev/arm/smmu_v3_ports.hh"
55#include "dev/arm/smmu_v3_proc.hh"
56#include "dev/arm/smmu_v3_ptops.hh"
57#include "dev/arm/smmu_v3_slaveifc.hh"
58#include "mem/mem_object.hh"
59#include "mem/packet.hh"
60#include "params/SMMUv3.hh"
58#include "mem/packet.hh"
59#include "params/SMMUv3.hh"
60#include "sim/clocked_object.hh"
61#include "sim/eventq.hh"
62
63/**
64 * @file:
65 * This is an implementation of the SMMUv3 architecture.
66 *
67 * What can it do?
68 * - Single-stage and nested translation with 4k or 64k granule. 16k would

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75 * - Fragment stage 1 page when the underlying stage 2 page is smaller. S1
76 * page size > S2 page size is not supported
77 * - Invalidations take zero time. This wouldn't be hard to fix.
78 * - Checkpointing is not supported
79 * - Stall/resume for faulting transactions is not supported
80 */
81class SMMUTranslationProcess;
82
61#include "sim/eventq.hh"
62
63/**
64 * @file:
65 * This is an implementation of the SMMUv3 architecture.
66 *
67 * What can it do?
68 * - Single-stage and nested translation with 4k or 64k granule. 16k would

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75 * - Fragment stage 1 page when the underlying stage 2 page is smaller. S1
76 * page size > S2 page size is not supported
77 * - Invalidations take zero time. This wouldn't be hard to fix.
78 * - Checkpointing is not supported
79 * - Stall/resume for faulting transactions is not supported
80 */
81class SMMUTranslationProcess;
82
83class SMMUv3 : public MemObject
83class SMMUv3 : public ClockedObject
84{
85 protected:
86
87 friend class SMMUProcess;
88 friend class SMMUTranslationProcess;
89 friend class SMMUCommandExecProcess;
90 friend class SMMUv3SlaveInterface;
91

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85 protected:
86
87 friend class SMMUProcess;
88 friend class SMMUTranslationProcess;
89 friend class SMMUCommandExecProcess;
90 friend class SMMUv3SlaveInterface;
91

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