1/*
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2 * Copyright (c) 2010,2013 ARM Limited
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2 * Copyright (c) 2010,2013,2015 ARM Limited |
3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions are 16 * met: redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer; 18 * redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution; 21 * neither the name of the copyright holders nor the names of its 22 * contributors may be used to endorse or promote products derived from 23 * this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * Authors: Ali Saidi 38 */ 39 40#ifndef __DEV_ARM_RV_HH__ 41#define __DEV_ARM_RV_HH__ 42 43#include "base/bitunion.hh" 44#include "dev/io_device.hh" 45#include "params/RealViewCtrl.hh"
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46#include "params/RealViewOsc.hh" |
47 48/** @file 49 * This implements the simple real view registers on a PBXA9 50 */ 51 52class RealViewCtrl : public BasicPioDevice 53{
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54 public: 55 enum DeviceFunc { 56 FUNC_OSC = 1, 57 FUNC_VOLT = 2, 58 FUNC_AMP = 3, 59 FUNC_TEMP = 4, 60 FUNC_RESET = 5, 61 FUNC_SCC = 6, 62 FUNC_MUXFPGA = 7, 63 FUNC_SHUTDOWN = 8, 64 FUNC_REBOOT = 9, 65 FUNC_DVIMODE = 11, 66 FUNC_POWER = 12, 67 FUNC_ENERGY = 13, 68 }; 69 70 class Device 71 { 72 public: 73 Device(RealViewCtrl &parent, DeviceFunc func, 74 uint8_t site, uint8_t pos, uint8_t dcc, uint16_t dev) 75 { 76 parent.registerDevice(func, site, pos, dcc, dev, this); 77 } 78 79 virtual ~Device() {} 80 81 virtual uint32_t read() const = 0; 82 virtual void write(uint32_t value) = 0; 83 }; 84 |
85 protected: 86 enum { 87 IdReg = 0x00, 88 SwReg = 0x04, 89 Led = 0x08, 90 Osc0 = 0x0C, 91 Osc1 = 0x10, 92 Osc2 = 0x14, 93 Osc3 = 0x18, 94 Osc4 = 0x1C, 95 Lock = 0x20, 96 Clock100 = 0x24, 97 CfgData1 = 0x28, 98 CfgData2 = 0x2C, 99 Flags = 0x30, 100 FlagsClr = 0x34, 101 NvFlags = 0x38, 102 NvFlagsClr = 0x3C, 103 ResetCtl = 0x40, 104 PciCtl = 0x44, 105 MciCtl = 0x48, 106 Flash = 0x4C, 107 Clcd = 0x50, 108 ClcdSer = 0x54, 109 Bootcs = 0x58, 110 Clock24 = 0x5C, 111 Misc = 0x60, 112 IoSel = 0x70, 113 ProcId0 = 0x84, 114 ProcId1 = 0x88, 115 CfgData = 0xA0, 116 CfgCtrl = 0xA4, 117 CfgStat = 0xA8, 118 TestOsc0 = 0xC0, 119 TestOsc1 = 0xC4, 120 TestOsc2 = 0xC8, 121 TestOsc3 = 0xCC, 122 TestOsc4 = 0xD0 123 }; 124 125 // system lock value 126 BitUnion32(SysLockReg) 127 Bitfield<15,0> lockVal; 128 Bitfield<16> locked; 129 EndBitUnion(SysLockReg) 130
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131 BitUnion32(CfgCtrlReg) 132 Bitfield<11, 0> dev; 133 Bitfield<15, 12> pos; 134 Bitfield<17, 16> site; 135 Bitfield<25, 20> func; 136 Bitfield<29, 26> dcc; 137 Bitfield<30> wr; 138 Bitfield<31> start; 139 EndBitUnion(CfgCtrlReg) 140 141 static const uint32_t CFG_CTRL_ADDR_MASK = 0x3fffffffUL; 142 |
143 SysLockReg sysLock; 144 145 /** This register is used for smp booting. 146 * The primary cpu writes the secondary start address here before 147 * sends it a soft interrupt. The secondary cpu reads this register and if 148 * it's non-zero it jumps to the address 149 */ 150 uint32_t flags; 151 152 /** This register contains the result from a system control reg access 153 */ 154 uint32_t scData; 155 156 public: 157 typedef RealViewCtrlParams Params; 158 const Params * 159 params() const 160 { 161 return dynamic_cast<const Params *>(_params); 162 } 163 /** 164 * The constructor for RealView just registers itself with the MMU. 165 * @param p params structure 166 */ 167 RealViewCtrl(Params *p); 168 169 /** 170 * Handle a read to the device 171 * @param pkt The memory request. 172 * @param data Where to put the data. 173 */
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130 virtual Tick read(PacketPtr pkt);
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174 Tick read(PacketPtr pkt) M5_ATTR_OVERRIDE; |
175 176 /** 177 * All writes are simply ignored. 178 * @param pkt The memory request. 179 * @param data the data 180 */
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137 virtual Tick write(PacketPtr pkt);
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181 Tick write(PacketPtr pkt) M5_ATTR_OVERRIDE; |
182 183 void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; 184 void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
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185 186 public: 187 void registerDevice(DeviceFunc func, uint8_t site, uint8_t pos, 188 uint8_t dcc, uint16_t dev, 189 Device *handler); 190 191 protected: 192 std::map<uint32_t, Device *> devices; |
193}; 194
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195/** 196 * This is an implementation of a programmable oscillator on the that 197 * can be configured through the RealView/Versatile Express 198 * configuration interface. 199 * 200 * See ARM DUI 0447J (ARM Motherboard Express uATX -- V2M-P1). 201 */ 202class RealViewOsc 203 : public ClockDomain, RealViewCtrl::Device 204{ 205 public: 206 RealViewOsc(RealViewOscParams *p); 207 virtual ~RealViewOsc() {}; |
208
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209 void startup() M5_ATTR_OVERRIDE; 210 211 void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; 212 void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; 213 214 public: // RealViewCtrl::Device interface 215 uint32_t read() const M5_ATTR_OVERRIDE; 216 void write(uint32_t freq) M5_ATTR_OVERRIDE; 217 218 protected: 219 void clockPeriod(Tick clock_period); 220}; 221 222 |
223#endif // __DEV_ARM_RV_HH__
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