1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Ali Saidi
38 */
39
40#ifndef __DEV_ARM_RTC_PL310_HH__
41#define __DEV_ARM_RTC_PL310_HH__
42
43#include "base/range.hh"
44#include "dev/arm/amba_device.hh"
45#include "params/PL031.hh"
46
47/** @file
48 * This implements the ARM Primecell 031 RTC
49 */
50
51class PL031 : public AmbaIntDevice
52{
53 protected:
54 enum {
55 DataReg = 0x00,
56 MatchReg = 0x04,
57 LoadReg = 0x08,
58 ControlReg = 0x0C,
59 IntMask = 0x10,
60 RawISR = 0x14,
61 MaskedISR = 0x18,
62 IntClear = 0x1C,
63 };
64
65 /* Seconds since epoch that correspond to time simulation was started at the
66 * begining of simulation and is then updated if ever written. */
67 uint32_t timeVal;
68
69 /* Time when the timeVal register was written */
70 Tick lastWrittenTick;
71
72 /* Previous load value */
73 uint32_t loadVal;
74
75 /* RTC Match Value
76 * Cause an interrupt when this value hits counter
77 */
78 uint32_t matchVal;
79
80 /** If timer has caused an interrupt. This is irrespective of
81 * interrupt enable */
82 bool rawInt;
83
84 /** If the timer interrupt mask that is anded with the raw interrupt to
85 * generate a pending interrupt
86 */
87 bool maskInt;
88
89 /** If an interrupt is currently pending. Logical and of CTRL.intEnable
90 * and rawInt */
91 bool pendingInt;
92
93 /** Called when the counter reaches matches */
94 void counterMatch();
95 EventWrapper<PL031, &PL031::counterMatch> matchEvent;
96
97 /** Called to update the matchEvent when the load Value or match value are
98 * written.
99 */
100 void resyncMatch();
101
102 public:
103 typedef PL031Params Params;
104 const Params *
105 params() const
106 {
107 return dynamic_cast<const Params *>(_params);
108 }
109 /**
110 * The constructor for RealView just registers itself with the MMU.
111 * @param p params structure
112 */
113 PL031(Params *p);
114
115 /**
116 * Handle a read to the device
117 * @param pkt The memory request.
118 * @param data Where to put the data.
119 */
120 virtual Tick read(PacketPtr pkt);
121
122 /**
123 * Handle writes to the device
124 * @param pkt The memory request.
125 * @param data the data
126 */
127 virtual Tick write(PacketPtr pkt);
128
129
130 virtual void serialize(std::ostream &os);
131 virtual void unserialize(Checkpoint *cp, const std::string &section);
132};
133
134
135#endif // __DEV_ARM_RTC_PL031_HH__
136