1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: William Wang
38 * Ali Saidi
39 */
40
41
42/** @file
43 * Implementiation of a PL111 CLCD controller
44 */
45
46#ifndef __DEV_ARM_PL111_HH__
47#define __DEV_ARM_PL111_HH__
48
49#include <fstream>
50
51#include "dev/arm/amba_device.hh"
52#include "params/Pl111.hh"
53#include "sim/serialize.hh"
54
55class Gic;
| 1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: William Wang
38 * Ali Saidi
39 */
40
41
42/** @file
43 * Implementiation of a PL111 CLCD controller
44 */
45
46#ifndef __DEV_ARM_PL111_HH__
47#define __DEV_ARM_PL111_HH__
48
49#include <fstream>
50
51#include "dev/arm/amba_device.hh"
52#include "params/Pl111.hh"
53#include "sim/serialize.hh"
54
55class Gic;
|
56class VncServer;
| 56class VncInput;
|
57class Bitmap;
58
59class Pl111: public AmbaDmaDevice
60{
61 protected:
62 static const uint64_t AMBA_ID = ULL(0xb105f00d00141111);
63 /** ARM PL111 register map*/
64 static const int LcdTiming0 = 0x000;
65 static const int LcdTiming1 = 0x004;
66 static const int LcdTiming2 = 0x008;
67 static const int LcdTiming3 = 0x00C;
68 static const int LcdUpBase = 0x010;
69 static const int LcdLpBase = 0x014;
70 static const int LcdControl = 0x018;
71 static const int LcdImsc = 0x01C;
72 static const int LcdRis = 0x020;
73 static const int LcdMis = 0x024;
74 static const int LcdIcr = 0x028;
75 static const int LcdUpCurr = 0x02C;
76 static const int LcdLpCurr = 0x030;
77 static const int LcdPalette = 0x200;
78 static const int CrsrImage = 0x800;
79 static const int ClcdCrsrCtrl = 0xC00;
80 static const int ClcdCrsrConfig = 0xC04;
81 static const int ClcdCrsrPalette0 = 0xC08;
82 static const int ClcdCrsrPalette1 = 0xC0C;
83 static const int ClcdCrsrXY = 0xC10;
84 static const int ClcdCrsrClip = 0xC14;
85 static const int ClcdCrsrImsc = 0xC20;
86 static const int ClcdCrsrIcr = 0xC24;
87 static const int ClcdCrsrRis = 0xC28;
88 static const int ClcdCrsrMis = 0xC2C;
89
90 static const int LcdPaletteSize = 128;
91 static const int CrsrImageSize = 256;
92
93 static const int LcdMaxWidth = 1024; // pixels per line
94 static const int LcdMaxHeight = 768; // lines per panel
95
96 static const int dmaSize = 8; // 64 bits
97 static const int maxOutstandingDma = 16; // 16 deep FIFO of 64 bits
98
99 enum LcdMode {
100 bpp1 = 0,
101 bpp2,
102 bpp4,
103 bpp8,
104 bpp16,
105 bpp24,
106 bpp16m565,
107 bpp12
108 };
109
110 BitUnion8(InterruptReg)
111 Bitfield<1> underflow;
112 Bitfield<2> baseaddr;
113 Bitfield<3> vcomp;
114 Bitfield<4> ahbmaster;
115 EndBitUnion(InterruptReg)
116
117 BitUnion32(TimingReg0)
118 Bitfield<7,2> ppl;
119 Bitfield<15,8> hsw;
120 Bitfield<23,16> hfp;
121 Bitfield<31,24> hbp;
122 EndBitUnion(TimingReg0)
123
124 BitUnion32(TimingReg1)
125 Bitfield<9,0> lpp;
126 Bitfield<15,10> vsw;
127 Bitfield<23,16> vfp;
128 Bitfield<31,24> vbp;
129 EndBitUnion(TimingReg1)
130
131 BitUnion32(TimingReg2)
132 Bitfield<4,0> pcdlo;
133 Bitfield<5> clksel;
134 Bitfield<10,6> acb;
135 Bitfield<11> avs;
136 Bitfield<12> ihs;
137 Bitfield<13> ipc;
138 Bitfield<14> ioe;
139 Bitfield<25,16> cpl;
140 Bitfield<26> bcd;
141 Bitfield<31,27> pcdhi;
142 EndBitUnion(TimingReg2)
143
144 BitUnion32(TimingReg3)
145 Bitfield<6,0> led;
146 Bitfield<16> lee;
147 EndBitUnion(TimingReg3)
148
149 BitUnion32(ControlReg)
150 Bitfield<0> lcden;
151 Bitfield<3,1> lcdbpp;
152 Bitfield<4> lcdbw;
153 Bitfield<5> lcdtft;
154 Bitfield<6> lcdmono8;
155 Bitfield<7> lcddual;
156 Bitfield<8> bgr;
157 Bitfield<9> bebo;
158 Bitfield<10> bepo;
159 Bitfield<11> lcdpwr;
160 Bitfield<13,12> lcdvcomp;
161 Bitfield<16> watermark;
162 EndBitUnion(ControlReg)
163
164 /** Horizontal axis panel control register */
165 TimingReg0 lcdTiming0;
166
167 /** Vertical axis panel control register */
168 TimingReg1 lcdTiming1;
169
170 /** Clock and signal polarity control register */
171 TimingReg2 lcdTiming2;
172
173 /** Line end control register */
174 TimingReg3 lcdTiming3;
175
176 /** Upper panel frame base address register */
177 int lcdUpbase;
178
179 /** Lower panel frame base address register */
180 int lcdLpbase;
181
182 /** Control register */
183 ControlReg lcdControl;
184
185 /** Interrupt mask set/clear register */
186 InterruptReg lcdImsc;
187
188 /** Raw interrupt status register - const */
189 InterruptReg lcdRis;
190
191 /** Masked interrupt status register */
192 InterruptReg lcdMis;
193
194 /** 256x16-bit color palette registers
195 * 256 palette entries organized as 128 locations of two entries per word */
196 int lcdPalette[LcdPaletteSize];
197
198 /** Cursor image RAM register
199 * 256-word wide values defining images overlaid by the hw cursor mechanism */
200 int cursorImage[CrsrImageSize];
201
202 /** Cursor control register */
203 int clcdCrsrCtrl;
204
205 /** Cursor configuration register */
206 int clcdCrsrConfig;
207
208 /** Cursor palette registers */
209 int clcdCrsrPalette0;
210 int clcdCrsrPalette1;
211
212 /** Cursor XY position register */
213 int clcdCrsrXY;
214
215 /** Cursor clip position register */
216 int clcdCrsrClip;
217
218 /** Cursor interrupt mask set/clear register */
219 InterruptReg clcdCrsrImsc;
220
221 /** Cursor interrupt clear register */
222 InterruptReg clcdCrsrIcr;
223
224 /** Cursor raw interrupt status register - const */
225 InterruptReg clcdCrsrRis;
226
227 /** Cursor masked interrupt status register - const */
228 InterruptReg clcdCrsrMis;
229
230 /** VNC server */
| 57class Bitmap;
58
59class Pl111: public AmbaDmaDevice
60{
61 protected:
62 static const uint64_t AMBA_ID = ULL(0xb105f00d00141111);
63 /** ARM PL111 register map*/
64 static const int LcdTiming0 = 0x000;
65 static const int LcdTiming1 = 0x004;
66 static const int LcdTiming2 = 0x008;
67 static const int LcdTiming3 = 0x00C;
68 static const int LcdUpBase = 0x010;
69 static const int LcdLpBase = 0x014;
70 static const int LcdControl = 0x018;
71 static const int LcdImsc = 0x01C;
72 static const int LcdRis = 0x020;
73 static const int LcdMis = 0x024;
74 static const int LcdIcr = 0x028;
75 static const int LcdUpCurr = 0x02C;
76 static const int LcdLpCurr = 0x030;
77 static const int LcdPalette = 0x200;
78 static const int CrsrImage = 0x800;
79 static const int ClcdCrsrCtrl = 0xC00;
80 static const int ClcdCrsrConfig = 0xC04;
81 static const int ClcdCrsrPalette0 = 0xC08;
82 static const int ClcdCrsrPalette1 = 0xC0C;
83 static const int ClcdCrsrXY = 0xC10;
84 static const int ClcdCrsrClip = 0xC14;
85 static const int ClcdCrsrImsc = 0xC20;
86 static const int ClcdCrsrIcr = 0xC24;
87 static const int ClcdCrsrRis = 0xC28;
88 static const int ClcdCrsrMis = 0xC2C;
89
90 static const int LcdPaletteSize = 128;
91 static const int CrsrImageSize = 256;
92
93 static const int LcdMaxWidth = 1024; // pixels per line
94 static const int LcdMaxHeight = 768; // lines per panel
95
96 static const int dmaSize = 8; // 64 bits
97 static const int maxOutstandingDma = 16; // 16 deep FIFO of 64 bits
98
99 enum LcdMode {
100 bpp1 = 0,
101 bpp2,
102 bpp4,
103 bpp8,
104 bpp16,
105 bpp24,
106 bpp16m565,
107 bpp12
108 };
109
110 BitUnion8(InterruptReg)
111 Bitfield<1> underflow;
112 Bitfield<2> baseaddr;
113 Bitfield<3> vcomp;
114 Bitfield<4> ahbmaster;
115 EndBitUnion(InterruptReg)
116
117 BitUnion32(TimingReg0)
118 Bitfield<7,2> ppl;
119 Bitfield<15,8> hsw;
120 Bitfield<23,16> hfp;
121 Bitfield<31,24> hbp;
122 EndBitUnion(TimingReg0)
123
124 BitUnion32(TimingReg1)
125 Bitfield<9,0> lpp;
126 Bitfield<15,10> vsw;
127 Bitfield<23,16> vfp;
128 Bitfield<31,24> vbp;
129 EndBitUnion(TimingReg1)
130
131 BitUnion32(TimingReg2)
132 Bitfield<4,0> pcdlo;
133 Bitfield<5> clksel;
134 Bitfield<10,6> acb;
135 Bitfield<11> avs;
136 Bitfield<12> ihs;
137 Bitfield<13> ipc;
138 Bitfield<14> ioe;
139 Bitfield<25,16> cpl;
140 Bitfield<26> bcd;
141 Bitfield<31,27> pcdhi;
142 EndBitUnion(TimingReg2)
143
144 BitUnion32(TimingReg3)
145 Bitfield<6,0> led;
146 Bitfield<16> lee;
147 EndBitUnion(TimingReg3)
148
149 BitUnion32(ControlReg)
150 Bitfield<0> lcden;
151 Bitfield<3,1> lcdbpp;
152 Bitfield<4> lcdbw;
153 Bitfield<5> lcdtft;
154 Bitfield<6> lcdmono8;
155 Bitfield<7> lcddual;
156 Bitfield<8> bgr;
157 Bitfield<9> bebo;
158 Bitfield<10> bepo;
159 Bitfield<11> lcdpwr;
160 Bitfield<13,12> lcdvcomp;
161 Bitfield<16> watermark;
162 EndBitUnion(ControlReg)
163
164 /** Horizontal axis panel control register */
165 TimingReg0 lcdTiming0;
166
167 /** Vertical axis panel control register */
168 TimingReg1 lcdTiming1;
169
170 /** Clock and signal polarity control register */
171 TimingReg2 lcdTiming2;
172
173 /** Line end control register */
174 TimingReg3 lcdTiming3;
175
176 /** Upper panel frame base address register */
177 int lcdUpbase;
178
179 /** Lower panel frame base address register */
180 int lcdLpbase;
181
182 /** Control register */
183 ControlReg lcdControl;
184
185 /** Interrupt mask set/clear register */
186 InterruptReg lcdImsc;
187
188 /** Raw interrupt status register - const */
189 InterruptReg lcdRis;
190
191 /** Masked interrupt status register */
192 InterruptReg lcdMis;
193
194 /** 256x16-bit color palette registers
195 * 256 palette entries organized as 128 locations of two entries per word */
196 int lcdPalette[LcdPaletteSize];
197
198 /** Cursor image RAM register
199 * 256-word wide values defining images overlaid by the hw cursor mechanism */
200 int cursorImage[CrsrImageSize];
201
202 /** Cursor control register */
203 int clcdCrsrCtrl;
204
205 /** Cursor configuration register */
206 int clcdCrsrConfig;
207
208 /** Cursor palette registers */
209 int clcdCrsrPalette0;
210 int clcdCrsrPalette1;
211
212 /** Cursor XY position register */
213 int clcdCrsrXY;
214
215 /** Cursor clip position register */
216 int clcdCrsrClip;
217
218 /** Cursor interrupt mask set/clear register */
219 InterruptReg clcdCrsrImsc;
220
221 /** Cursor interrupt clear register */
222 InterruptReg clcdCrsrIcr;
223
224 /** Cursor raw interrupt status register - const */
225 InterruptReg clcdCrsrRis;
226
227 /** Cursor masked interrupt status register - const */
228 InterruptReg clcdCrsrMis;
229
230 /** VNC server */
|
231 VncServer *vncserver;
| 231 VncInput *vnc;
|
232
233 /** Helper to write out bitmaps */
234 Bitmap *bmp;
235
236 /** Picture of what the current frame buffer looks like */
237 std::ostream *pic;
238
239 /** Frame buffer width - pixels per line */
240 uint16_t width;
241
242 /** Frame buffer height - lines per panel */
243 uint16_t height;
244
245 /** Bytes per pixel */
246 uint8_t bytesPerPixel;
247
248 /** CLCDC supports up to 1024x768 */
249 uint8_t *dmaBuffer;
250
251 /** Start time for frame buffer dma read */
252 Tick startTime;
253
254 /** Frame buffer base address */
255 Addr startAddr;
256
257 /** Frame buffer max address */
258 Addr maxAddr;
259
260 /** Frame buffer current address */
261 Addr curAddr;
262
263 /** DMA FIFO watermark */
264 int waterMark;
265
266 /** Number of pending dma reads */
267 int dmaPendingNum;
268
269 /** Send updated parameters to the vnc server */
270 void updateVideoParams();
271
272 /** DMA framebuffer read */
273 void readFramebuffer();
274
275 /** Generate dma framebuffer read event */
276 void generateReadEvent();
277
278 /** Function to generate interrupt */
279 void generateInterrupt();
280
281 /** fillFIFO event */
282 void fillFifo();
283
284 /** start the dmas off after power is enabled */
285 void startDma();
286
287 /** DMA done event */
288 void dmaDone();
289
290 /** DMA framebuffer read event */
291 EventWrapper<Pl111, &Pl111::readFramebuffer> readEvent;
292
293 /** Fill fifo */
294 EventWrapper<Pl111, &Pl111::fillFifo> fillFifoEvent;
295
296 /** DMA done event */
297 std::vector<EventWrapper<Pl111, &Pl111::dmaDone> > dmaDoneEvent;
298
299 /** Wrapper to create an event out of the interrupt */
300 EventWrapper<Pl111, &Pl111::generateInterrupt> intEvent;
301
302 public:
303 typedef Pl111Params Params;
304
305 const Params *
306 params() const
307 {
308 return dynamic_cast<const Params *>(_params);
309 }
310 Pl111(const Params *p);
311 ~Pl111();
312
313 virtual Tick read(PacketPtr pkt);
314 virtual Tick write(PacketPtr pkt);
315
316 virtual void serialize(std::ostream &os);
317 virtual void unserialize(Checkpoint *cp, const std::string §ion);
318
319 /**
320 * Determine the address ranges that this device responds to.
321 *
322 * @return a list of non-overlapping address ranges
323 */
324 AddrRangeList getAddrRanges() const;
325};
326
327#endif
| 232
233 /** Helper to write out bitmaps */
234 Bitmap *bmp;
235
236 /** Picture of what the current frame buffer looks like */
237 std::ostream *pic;
238
239 /** Frame buffer width - pixels per line */
240 uint16_t width;
241
242 /** Frame buffer height - lines per panel */
243 uint16_t height;
244
245 /** Bytes per pixel */
246 uint8_t bytesPerPixel;
247
248 /** CLCDC supports up to 1024x768 */
249 uint8_t *dmaBuffer;
250
251 /** Start time for frame buffer dma read */
252 Tick startTime;
253
254 /** Frame buffer base address */
255 Addr startAddr;
256
257 /** Frame buffer max address */
258 Addr maxAddr;
259
260 /** Frame buffer current address */
261 Addr curAddr;
262
263 /** DMA FIFO watermark */
264 int waterMark;
265
266 /** Number of pending dma reads */
267 int dmaPendingNum;
268
269 /** Send updated parameters to the vnc server */
270 void updateVideoParams();
271
272 /** DMA framebuffer read */
273 void readFramebuffer();
274
275 /** Generate dma framebuffer read event */
276 void generateReadEvent();
277
278 /** Function to generate interrupt */
279 void generateInterrupt();
280
281 /** fillFIFO event */
282 void fillFifo();
283
284 /** start the dmas off after power is enabled */
285 void startDma();
286
287 /** DMA done event */
288 void dmaDone();
289
290 /** DMA framebuffer read event */
291 EventWrapper<Pl111, &Pl111::readFramebuffer> readEvent;
292
293 /** Fill fifo */
294 EventWrapper<Pl111, &Pl111::fillFifo> fillFifoEvent;
295
296 /** DMA done event */
297 std::vector<EventWrapper<Pl111, &Pl111::dmaDone> > dmaDoneEvent;
298
299 /** Wrapper to create an event out of the interrupt */
300 EventWrapper<Pl111, &Pl111::generateInterrupt> intEvent;
301
302 public:
303 typedef Pl111Params Params;
304
305 const Params *
306 params() const
307 {
308 return dynamic_cast<const Params *>(_params);
309 }
310 Pl111(const Params *p);
311 ~Pl111();
312
313 virtual Tick read(PacketPtr pkt);
314 virtual Tick write(PacketPtr pkt);
315
316 virtual void serialize(std::ostream &os);
317 virtual void unserialize(Checkpoint *cp, const std::string §ion);
318
319 /**
320 * Determine the address ranges that this device responds to.
321 *
322 * @return a list of non-overlapping address ranges
323 */
324 AddrRangeList getAddrRanges() const;
325};
326
327#endif
|