1/*
2 * Copyright (c) 2010-2012, 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: William Wang
38 * Ali Saidi
39 */
40
41#include "base/vnc/vncinput.hh"
42#include "base/output.hh"
43#include "base/trace.hh"
44#include "debug/PL111.hh"
45#include "debug/Uart.hh"
46#include "dev/arm/amba_device.hh"
47#include "dev/arm/base_gic.hh"
48#include "dev/arm/pl111.hh"
49#include "mem/packet.hh"
50#include "mem/packet_access.hh"
51#include "sim/system.hh"
52
53// clang complains about std::set being overloaded with Packet::set if
54// we open up the entire namespace std
55using std::vector;
56
57// initialize clcd registers
58Pl111::Pl111(const Params *p)
59 : AmbaDmaDevice(p), lcdTiming0(0), lcdTiming1(0), lcdTiming2(0),
60 lcdTiming3(0), lcdUpbase(0), lcdLpbase(0), lcdControl(0), lcdImsc(0),
61 lcdRis(0), lcdMis(0),
62 clcdCrsrCtrl(0), clcdCrsrConfig(0), clcdCrsrPalette0(0),
63 clcdCrsrPalette1(0), clcdCrsrXY(0), clcdCrsrClip(0), clcdCrsrImsc(0),
64 clcdCrsrIcr(0), clcdCrsrRis(0), clcdCrsrMis(0),
65 pixelClock(p->pixel_clock),
66 converter(PixelConverter::rgba8888_le), fb(LcdMaxWidth, LcdMaxHeight),
67 vnc(p->vnc), bmp(&fb), pic(NULL),
68 width(LcdMaxWidth), height(LcdMaxHeight),
69 bytesPerPixel(4), startTime(0), startAddr(0), maxAddr(0), curAddr(0),
70 waterMark(0), dmaPendingNum(0), readEvent(this), fillFifoEvent(this),
71 dmaDoneEventAll(maxOutstandingDma, this),
72 dmaDoneEventFree(maxOutstandingDma),
73 intEvent(this), enableCapture(p->enable_capture)
74{
75 pioSize = 0xFFFF;
76
77 dmaBuffer = new uint8_t[buffer_size];
78
79 memset(lcdPalette, 0, sizeof(lcdPalette));
80 memset(cursorImage, 0, sizeof(cursorImage));
81 memset(dmaBuffer, 0, buffer_size);
82
83 for (int i = 0; i < maxOutstandingDma; ++i)
84 dmaDoneEventFree[i] = &dmaDoneEventAll[i];
85
86 if (vnc)
87 vnc->setFrameBuffer(&fb);
88}
89
90Pl111::~Pl111()
91{
92 delete[] dmaBuffer;
93}
94
95// read registers and frame buffer
96Tick
97Pl111::read(PacketPtr pkt)
98{
99 // use a temporary data since the LCD registers are read/written with
100 // different size operations
101
102 uint32_t data = 0;
103
104 assert(pkt->getAddr() >= pioAddr &&
105 pkt->getAddr() < pioAddr + pioSize);
106
107 Addr daddr = pkt->getAddr() - pioAddr;
108
109 DPRINTF(PL111, " read register %#x size=%d\n", daddr, pkt->getSize());
110
111 switch (daddr) {
112 case LcdTiming0:
113 data = lcdTiming0;
114 break;
115 case LcdTiming1:
116 data = lcdTiming1;
117 break;
118 case LcdTiming2:
119 data = lcdTiming2;
120 break;
121 case LcdTiming3:
122 data = lcdTiming3;
123 break;
124 case LcdUpBase:
125 data = lcdUpbase;
126 break;
127 case LcdLpBase:
128 data = lcdLpbase;
129 break;
130 case LcdControl:
131 data = lcdControl;
132 break;
133 case LcdImsc:
134 data = lcdImsc;
135 break;
136 case LcdRis:
137 data = lcdRis;
138 break;
139 case LcdMis:
140 data = lcdMis;
141 break;
142 case LcdIcr:
143 panic("LCD register at offset %#x is Write-Only\n", daddr);
144 break;
145 case LcdUpCurr:
146 data = curAddr;
147 break;
148 case LcdLpCurr:
149 data = curAddr;
150 break;
151 case ClcdCrsrCtrl:
152 data = clcdCrsrCtrl;
153 break;
154 case ClcdCrsrConfig:
155 data = clcdCrsrConfig;
156 break;
157 case ClcdCrsrPalette0:
158 data = clcdCrsrPalette0;
159 break;
160 case ClcdCrsrPalette1:
161 data = clcdCrsrPalette1;
162 break;
163 case ClcdCrsrXY:
164 data = clcdCrsrXY;
165 break;
166 case ClcdCrsrClip:
167 data = clcdCrsrClip;
168 break;
169 case ClcdCrsrImsc:
170 data = clcdCrsrImsc;
171 break;
172 case ClcdCrsrIcr:
173 panic("CLCD register at offset %#x is Write-Only\n", daddr);
174 break;
175 case ClcdCrsrRis:
176 data = clcdCrsrRis;
177 break;
178 case ClcdCrsrMis:
179 data = clcdCrsrMis;
180 break;
181 default:
182 if (readId(pkt, AMBA_ID, pioAddr)) {
183 // Hack for variable size accesses
184 data = pkt->get<uint32_t>();
185 break;
186 } else if (daddr >= CrsrImage && daddr <= 0xBFC) {
187 // CURSOR IMAGE
188 int index;
189 index = (daddr - CrsrImage) >> 2;
190 data= cursorImage[index];
191 break;
192 } else if (daddr >= LcdPalette && daddr <= 0x3FC) {
193 // LCD Palette
194 int index;
195 index = (daddr - LcdPalette) >> 2;
196 data = lcdPalette[index];
197 break;
198 } else {
199 panic("Tried to read CLCD register at offset %#x that "
200 "doesn't exist\n", daddr);
201 break;
202 }
203 }
204
205 switch(pkt->getSize()) {
206 case 1:
207 pkt->set<uint8_t>(data);
208 break;
209 case 2:
210 pkt->set<uint16_t>(data);
211 break;
212 case 4:
213 pkt->set<uint32_t>(data);
214 break;
215 default:
216 panic("CLCD controller read size too big?\n");
217 break;
218 }
219
220 pkt->makeAtomicResponse();
221 return pioDelay;
222}
223
224// write registers and frame buffer
225Tick
226Pl111::write(PacketPtr pkt)
227{
228 // use a temporary data since the LCD registers are read/written with
229 // different size operations
230 //
231 uint32_t data = 0;
232
233 switch(pkt->getSize()) {
234 case 1:
235 data = pkt->get<uint8_t>();
236 break;
237 case 2:
238 data = pkt->get<uint16_t>();
239 break;
240 case 4:
241 data = pkt->get<uint32_t>();
242 break;
243 default:
244 panic("PL111 CLCD controller write size too big?\n");
245 break;
246 }
247
248 assert(pkt->getAddr() >= pioAddr &&
249 pkt->getAddr() < pioAddr + pioSize);
250
251 Addr daddr = pkt->getAddr() - pioAddr;
252
253 DPRINTF(PL111, " write register %#x value %#x size=%d\n", daddr,
254 pkt->get<uint8_t>(), pkt->getSize());
255
256 switch (daddr) {
257 case LcdTiming0:
258 lcdTiming0 = data;
259 // width = 16 * (PPL+1)
260 width = (lcdTiming0.ppl + 1) << 4;
261 break;
262 case LcdTiming1:
263 lcdTiming1 = data;
264 // height = LPP + 1
265 height = (lcdTiming1.lpp) + 1;
266 break;
267 case LcdTiming2:
268 lcdTiming2 = data;
269 break;
270 case LcdTiming3:
271 lcdTiming3 = data;
272 break;
273 case LcdUpBase:
274 lcdUpbase = data;
275 DPRINTF(PL111, "####### Upper panel base set to: %#x #######\n", lcdUpbase);
276 break;
277 case LcdLpBase:
278 warn_once("LCD dual screen mode not supported\n");
279 lcdLpbase = data;
280 DPRINTF(PL111, "###### Lower panel base set to: %#x #######\n", lcdLpbase);
281 break;
282 case LcdControl:
283 int old_lcdpwr;
284 old_lcdpwr = lcdControl.lcdpwr;
285 lcdControl = data;
286
287 DPRINTF(PL111, "LCD power is:%d\n", lcdControl.lcdpwr);
288
289 // LCD power enable
290 if (lcdControl.lcdpwr && !old_lcdpwr) {
291 updateVideoParams();
292 DPRINTF(PL111, " lcd size: height %d width %d\n", height, width);
293 waterMark = lcdControl.watermark ? 8 : 4;
294 startDma();
295 }
296 break;
297 case LcdImsc:
298 lcdImsc = data;
299 if (lcdImsc.vcomp)
300 panic("Interrupting on vcomp not supported\n");
301
302 lcdMis = lcdImsc & lcdRis;
303
304 if (!lcdMis)
305 gic->clearInt(intNum);
306
307 break;
308 case LcdRis:
309 panic("LCD register at offset %#x is Read-Only\n", daddr);
310 break;
311 case LcdMis:
312 panic("LCD register at offset %#x is Read-Only\n", daddr);
313 break;
314 case LcdIcr:
315 lcdRis = lcdRis & ~data;
316 lcdMis = lcdImsc & lcdRis;
317
318 if (!lcdMis)
319 gic->clearInt(intNum);
320
321 break;
322 case LcdUpCurr:
323 panic("LCD register at offset %#x is Read-Only\n", daddr);
324 break;
325 case LcdLpCurr:
326 panic("LCD register at offset %#x is Read-Only\n", daddr);
327 break;
328 case ClcdCrsrCtrl:
329 clcdCrsrCtrl = data;
330 break;
331 case ClcdCrsrConfig:
332 clcdCrsrConfig = data;
333 break;
334 case ClcdCrsrPalette0:
335 clcdCrsrPalette0 = data;
336 break;
337 case ClcdCrsrPalette1:
338 clcdCrsrPalette1 = data;
339 break;
340 case ClcdCrsrXY:
341 clcdCrsrXY = data;
342 break;
343 case ClcdCrsrClip:
344 clcdCrsrClip = data;
345 break;
346 case ClcdCrsrImsc:
347 clcdCrsrImsc = data;
348 break;
349 case ClcdCrsrIcr:
350 clcdCrsrIcr = data;
351 break;
352 case ClcdCrsrRis:
353 panic("CLCD register at offset %#x is Read-Only\n", daddr);
354 break;
355 case ClcdCrsrMis:
356 panic("CLCD register at offset %#x is Read-Only\n", daddr);
357 break;
358 default:
359 if (daddr >= CrsrImage && daddr <= 0xBFC) {
360 // CURSOR IMAGE
361 int index;
362 index = (daddr - CrsrImage) >> 2;
363 cursorImage[index] = data;
364 break;
365 } else if (daddr >= LcdPalette && daddr <= 0x3FC) {
366 // LCD Palette
367 int index;
368 index = (daddr - LcdPalette) >> 2;
369 lcdPalette[index] = data;
370 break;
371 } else {
372 panic("Tried to write PL111 register at offset %#x that "
373 "doesn't exist\n", daddr);
374 break;
375 }
376 }
377
378 pkt->makeAtomicResponse();
379 return pioDelay;
380}
381
382PixelConverter
383Pl111::pixelConverter() const
384{
385 unsigned rw, gw, bw;
386 unsigned offsets[3];
387
388 switch (lcdControl.lcdbpp) {
389 case bpp24:
390 rw = gw = bw = 8;
391 offsets[0] = 0;
392 offsets[1] = 8;
393 offsets[2] = 16;
394 break;
395
396 case bpp16m565:
397 rw = 5;
398 gw = 6;
399 bw = 5;
400 offsets[0] = 0;
401 offsets[1] = 5;
402 offsets[2] = 11;
403 break;
404
405 default:
406 panic("Unimplemented video mode\n");
407 }
408
409 if (lcdControl.bgr) {
410 return PixelConverter(
411 bytesPerPixel,
412 offsets[2], offsets[1], offsets[0],
413 rw, gw, bw,
414 LittleEndianByteOrder);
415 } else {
416 return PixelConverter(
417 bytesPerPixel,
418 offsets[0], offsets[1], offsets[2],
419 rw, gw, bw,
420 LittleEndianByteOrder);
421 }
422}
423
424void
425Pl111::updateVideoParams()
426{
427 if (lcdControl.lcdbpp == bpp24) {
428 bytesPerPixel = 4;
429 } else if (lcdControl.lcdbpp == bpp16m565) {
430 bytesPerPixel = 2;
431 }
432
433 fb.resize(width, height);
434 converter = pixelConverter();
435
436 // Workaround configuration bugs where multiple display
437 // controllers are attached to the same VNC server by reattaching
438 // enabled devices. This isn't ideal, but works as long as only
439 // one display controller is active at a time.
440 if (lcdControl.lcdpwr && vnc)
441 vnc->setFrameBuffer(&fb);
442}
443
444void
445Pl111::startDma()
446{
447 if (dmaPendingNum != 0 || readEvent.scheduled())
448 return;
449 readFramebuffer();
450}
451
452void
453Pl111::readFramebuffer()
454{
455 // initialization for dma read from frame buffer to dma buffer
456 uint32_t length = height * width;
457 if (startAddr != lcdUpbase)
458 startAddr = lcdUpbase;
459
460 // Updating base address, interrupt if we're supposed to
461 lcdRis.baseaddr = 1;
462 if (!intEvent.scheduled())
463 schedule(intEvent, clockEdge());
464
465 curAddr = 0;
466 startTime = curTick();
467
468 maxAddr = static_cast<Addr>(length * bytesPerPixel);
469
470 DPRINTF(PL111, " lcd frame buffer size of %d bytes \n", maxAddr);
471
472 fillFifo();
473}
474
475void
476Pl111::fillFifo()
477{
478 while ((dmaPendingNum < maxOutstandingDma) && (maxAddr >= curAddr + dmaSize )) {
479 // concurrent dma reads need different dma done events
480 // due to assertion in scheduling state
481 ++dmaPendingNum;
482
483 assert(!dmaDoneEventFree.empty());
484 DmaDoneEvent *event(dmaDoneEventFree.back());
485 dmaDoneEventFree.pop_back();
486 assert(!event->scheduled());
487
488 // We use a uncachable request here because the requests from the CPU
489 // will be uncacheable as well. If we have uncacheable and cacheable
490 // requests in the memory system for the same address it won't be
491 // pleased
492 dmaPort.dmaAction(MemCmd::ReadReq, curAddr + startAddr, dmaSize,
493 event, curAddr + dmaBuffer,
494 0, Request::UNCACHEABLE);
495 curAddr += dmaSize;
496 }
497}
498
499void
500Pl111::dmaDone()
501{
502 DPRINTF(PL111, "DMA Done\n");
503
504 Tick maxFrameTime = lcdTiming2.cpl * height * pixelClock;
505
506 --dmaPendingNum;
507
508 if (maxAddr == curAddr && !dmaPendingNum) {
509 if ((curTick() - startTime) > maxFrameTime) {
510 warn("CLCD controller buffer underrun, took %d ticks when should"
511 " have taken %d\n", curTick() - startTime, maxFrameTime);
512 lcdRis.underflow = 1;
513 if (!intEvent.scheduled())
514 schedule(intEvent, clockEdge());
515 }
516
517 assert(!readEvent.scheduled());
518 fb.copyIn(dmaBuffer, converter);
519 if (vnc)
520 vnc->setDirty();
521
522 if (enableCapture) {
523 DPRINTF(PL111, "-- write out frame buffer into bmp\n");
524
525 if (!pic)
| 1/*
2 * Copyright (c) 2010-2012, 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: William Wang
38 * Ali Saidi
39 */
40
41#include "base/vnc/vncinput.hh"
42#include "base/output.hh"
43#include "base/trace.hh"
44#include "debug/PL111.hh"
45#include "debug/Uart.hh"
46#include "dev/arm/amba_device.hh"
47#include "dev/arm/base_gic.hh"
48#include "dev/arm/pl111.hh"
49#include "mem/packet.hh"
50#include "mem/packet_access.hh"
51#include "sim/system.hh"
52
53// clang complains about std::set being overloaded with Packet::set if
54// we open up the entire namespace std
55using std::vector;
56
57// initialize clcd registers
58Pl111::Pl111(const Params *p)
59 : AmbaDmaDevice(p), lcdTiming0(0), lcdTiming1(0), lcdTiming2(0),
60 lcdTiming3(0), lcdUpbase(0), lcdLpbase(0), lcdControl(0), lcdImsc(0),
61 lcdRis(0), lcdMis(0),
62 clcdCrsrCtrl(0), clcdCrsrConfig(0), clcdCrsrPalette0(0),
63 clcdCrsrPalette1(0), clcdCrsrXY(0), clcdCrsrClip(0), clcdCrsrImsc(0),
64 clcdCrsrIcr(0), clcdCrsrRis(0), clcdCrsrMis(0),
65 pixelClock(p->pixel_clock),
66 converter(PixelConverter::rgba8888_le), fb(LcdMaxWidth, LcdMaxHeight),
67 vnc(p->vnc), bmp(&fb), pic(NULL),
68 width(LcdMaxWidth), height(LcdMaxHeight),
69 bytesPerPixel(4), startTime(0), startAddr(0), maxAddr(0), curAddr(0),
70 waterMark(0), dmaPendingNum(0), readEvent(this), fillFifoEvent(this),
71 dmaDoneEventAll(maxOutstandingDma, this),
72 dmaDoneEventFree(maxOutstandingDma),
73 intEvent(this), enableCapture(p->enable_capture)
74{
75 pioSize = 0xFFFF;
76
77 dmaBuffer = new uint8_t[buffer_size];
78
79 memset(lcdPalette, 0, sizeof(lcdPalette));
80 memset(cursorImage, 0, sizeof(cursorImage));
81 memset(dmaBuffer, 0, buffer_size);
82
83 for (int i = 0; i < maxOutstandingDma; ++i)
84 dmaDoneEventFree[i] = &dmaDoneEventAll[i];
85
86 if (vnc)
87 vnc->setFrameBuffer(&fb);
88}
89
90Pl111::~Pl111()
91{
92 delete[] dmaBuffer;
93}
94
95// read registers and frame buffer
96Tick
97Pl111::read(PacketPtr pkt)
98{
99 // use a temporary data since the LCD registers are read/written with
100 // different size operations
101
102 uint32_t data = 0;
103
104 assert(pkt->getAddr() >= pioAddr &&
105 pkt->getAddr() < pioAddr + pioSize);
106
107 Addr daddr = pkt->getAddr() - pioAddr;
108
109 DPRINTF(PL111, " read register %#x size=%d\n", daddr, pkt->getSize());
110
111 switch (daddr) {
112 case LcdTiming0:
113 data = lcdTiming0;
114 break;
115 case LcdTiming1:
116 data = lcdTiming1;
117 break;
118 case LcdTiming2:
119 data = lcdTiming2;
120 break;
121 case LcdTiming3:
122 data = lcdTiming3;
123 break;
124 case LcdUpBase:
125 data = lcdUpbase;
126 break;
127 case LcdLpBase:
128 data = lcdLpbase;
129 break;
130 case LcdControl:
131 data = lcdControl;
132 break;
133 case LcdImsc:
134 data = lcdImsc;
135 break;
136 case LcdRis:
137 data = lcdRis;
138 break;
139 case LcdMis:
140 data = lcdMis;
141 break;
142 case LcdIcr:
143 panic("LCD register at offset %#x is Write-Only\n", daddr);
144 break;
145 case LcdUpCurr:
146 data = curAddr;
147 break;
148 case LcdLpCurr:
149 data = curAddr;
150 break;
151 case ClcdCrsrCtrl:
152 data = clcdCrsrCtrl;
153 break;
154 case ClcdCrsrConfig:
155 data = clcdCrsrConfig;
156 break;
157 case ClcdCrsrPalette0:
158 data = clcdCrsrPalette0;
159 break;
160 case ClcdCrsrPalette1:
161 data = clcdCrsrPalette1;
162 break;
163 case ClcdCrsrXY:
164 data = clcdCrsrXY;
165 break;
166 case ClcdCrsrClip:
167 data = clcdCrsrClip;
168 break;
169 case ClcdCrsrImsc:
170 data = clcdCrsrImsc;
171 break;
172 case ClcdCrsrIcr:
173 panic("CLCD register at offset %#x is Write-Only\n", daddr);
174 break;
175 case ClcdCrsrRis:
176 data = clcdCrsrRis;
177 break;
178 case ClcdCrsrMis:
179 data = clcdCrsrMis;
180 break;
181 default:
182 if (readId(pkt, AMBA_ID, pioAddr)) {
183 // Hack for variable size accesses
184 data = pkt->get<uint32_t>();
185 break;
186 } else if (daddr >= CrsrImage && daddr <= 0xBFC) {
187 // CURSOR IMAGE
188 int index;
189 index = (daddr - CrsrImage) >> 2;
190 data= cursorImage[index];
191 break;
192 } else if (daddr >= LcdPalette && daddr <= 0x3FC) {
193 // LCD Palette
194 int index;
195 index = (daddr - LcdPalette) >> 2;
196 data = lcdPalette[index];
197 break;
198 } else {
199 panic("Tried to read CLCD register at offset %#x that "
200 "doesn't exist\n", daddr);
201 break;
202 }
203 }
204
205 switch(pkt->getSize()) {
206 case 1:
207 pkt->set<uint8_t>(data);
208 break;
209 case 2:
210 pkt->set<uint16_t>(data);
211 break;
212 case 4:
213 pkt->set<uint32_t>(data);
214 break;
215 default:
216 panic("CLCD controller read size too big?\n");
217 break;
218 }
219
220 pkt->makeAtomicResponse();
221 return pioDelay;
222}
223
224// write registers and frame buffer
225Tick
226Pl111::write(PacketPtr pkt)
227{
228 // use a temporary data since the LCD registers are read/written with
229 // different size operations
230 //
231 uint32_t data = 0;
232
233 switch(pkt->getSize()) {
234 case 1:
235 data = pkt->get<uint8_t>();
236 break;
237 case 2:
238 data = pkt->get<uint16_t>();
239 break;
240 case 4:
241 data = pkt->get<uint32_t>();
242 break;
243 default:
244 panic("PL111 CLCD controller write size too big?\n");
245 break;
246 }
247
248 assert(pkt->getAddr() >= pioAddr &&
249 pkt->getAddr() < pioAddr + pioSize);
250
251 Addr daddr = pkt->getAddr() - pioAddr;
252
253 DPRINTF(PL111, " write register %#x value %#x size=%d\n", daddr,
254 pkt->get<uint8_t>(), pkt->getSize());
255
256 switch (daddr) {
257 case LcdTiming0:
258 lcdTiming0 = data;
259 // width = 16 * (PPL+1)
260 width = (lcdTiming0.ppl + 1) << 4;
261 break;
262 case LcdTiming1:
263 lcdTiming1 = data;
264 // height = LPP + 1
265 height = (lcdTiming1.lpp) + 1;
266 break;
267 case LcdTiming2:
268 lcdTiming2 = data;
269 break;
270 case LcdTiming3:
271 lcdTiming3 = data;
272 break;
273 case LcdUpBase:
274 lcdUpbase = data;
275 DPRINTF(PL111, "####### Upper panel base set to: %#x #######\n", lcdUpbase);
276 break;
277 case LcdLpBase:
278 warn_once("LCD dual screen mode not supported\n");
279 lcdLpbase = data;
280 DPRINTF(PL111, "###### Lower panel base set to: %#x #######\n", lcdLpbase);
281 break;
282 case LcdControl:
283 int old_lcdpwr;
284 old_lcdpwr = lcdControl.lcdpwr;
285 lcdControl = data;
286
287 DPRINTF(PL111, "LCD power is:%d\n", lcdControl.lcdpwr);
288
289 // LCD power enable
290 if (lcdControl.lcdpwr && !old_lcdpwr) {
291 updateVideoParams();
292 DPRINTF(PL111, " lcd size: height %d width %d\n", height, width);
293 waterMark = lcdControl.watermark ? 8 : 4;
294 startDma();
295 }
296 break;
297 case LcdImsc:
298 lcdImsc = data;
299 if (lcdImsc.vcomp)
300 panic("Interrupting on vcomp not supported\n");
301
302 lcdMis = lcdImsc & lcdRis;
303
304 if (!lcdMis)
305 gic->clearInt(intNum);
306
307 break;
308 case LcdRis:
309 panic("LCD register at offset %#x is Read-Only\n", daddr);
310 break;
311 case LcdMis:
312 panic("LCD register at offset %#x is Read-Only\n", daddr);
313 break;
314 case LcdIcr:
315 lcdRis = lcdRis & ~data;
316 lcdMis = lcdImsc & lcdRis;
317
318 if (!lcdMis)
319 gic->clearInt(intNum);
320
321 break;
322 case LcdUpCurr:
323 panic("LCD register at offset %#x is Read-Only\n", daddr);
324 break;
325 case LcdLpCurr:
326 panic("LCD register at offset %#x is Read-Only\n", daddr);
327 break;
328 case ClcdCrsrCtrl:
329 clcdCrsrCtrl = data;
330 break;
331 case ClcdCrsrConfig:
332 clcdCrsrConfig = data;
333 break;
334 case ClcdCrsrPalette0:
335 clcdCrsrPalette0 = data;
336 break;
337 case ClcdCrsrPalette1:
338 clcdCrsrPalette1 = data;
339 break;
340 case ClcdCrsrXY:
341 clcdCrsrXY = data;
342 break;
343 case ClcdCrsrClip:
344 clcdCrsrClip = data;
345 break;
346 case ClcdCrsrImsc:
347 clcdCrsrImsc = data;
348 break;
349 case ClcdCrsrIcr:
350 clcdCrsrIcr = data;
351 break;
352 case ClcdCrsrRis:
353 panic("CLCD register at offset %#x is Read-Only\n", daddr);
354 break;
355 case ClcdCrsrMis:
356 panic("CLCD register at offset %#x is Read-Only\n", daddr);
357 break;
358 default:
359 if (daddr >= CrsrImage && daddr <= 0xBFC) {
360 // CURSOR IMAGE
361 int index;
362 index = (daddr - CrsrImage) >> 2;
363 cursorImage[index] = data;
364 break;
365 } else if (daddr >= LcdPalette && daddr <= 0x3FC) {
366 // LCD Palette
367 int index;
368 index = (daddr - LcdPalette) >> 2;
369 lcdPalette[index] = data;
370 break;
371 } else {
372 panic("Tried to write PL111 register at offset %#x that "
373 "doesn't exist\n", daddr);
374 break;
375 }
376 }
377
378 pkt->makeAtomicResponse();
379 return pioDelay;
380}
381
382PixelConverter
383Pl111::pixelConverter() const
384{
385 unsigned rw, gw, bw;
386 unsigned offsets[3];
387
388 switch (lcdControl.lcdbpp) {
389 case bpp24:
390 rw = gw = bw = 8;
391 offsets[0] = 0;
392 offsets[1] = 8;
393 offsets[2] = 16;
394 break;
395
396 case bpp16m565:
397 rw = 5;
398 gw = 6;
399 bw = 5;
400 offsets[0] = 0;
401 offsets[1] = 5;
402 offsets[2] = 11;
403 break;
404
405 default:
406 panic("Unimplemented video mode\n");
407 }
408
409 if (lcdControl.bgr) {
410 return PixelConverter(
411 bytesPerPixel,
412 offsets[2], offsets[1], offsets[0],
413 rw, gw, bw,
414 LittleEndianByteOrder);
415 } else {
416 return PixelConverter(
417 bytesPerPixel,
418 offsets[0], offsets[1], offsets[2],
419 rw, gw, bw,
420 LittleEndianByteOrder);
421 }
422}
423
424void
425Pl111::updateVideoParams()
426{
427 if (lcdControl.lcdbpp == bpp24) {
428 bytesPerPixel = 4;
429 } else if (lcdControl.lcdbpp == bpp16m565) {
430 bytesPerPixel = 2;
431 }
432
433 fb.resize(width, height);
434 converter = pixelConverter();
435
436 // Workaround configuration bugs where multiple display
437 // controllers are attached to the same VNC server by reattaching
438 // enabled devices. This isn't ideal, but works as long as only
439 // one display controller is active at a time.
440 if (lcdControl.lcdpwr && vnc)
441 vnc->setFrameBuffer(&fb);
442}
443
444void
445Pl111::startDma()
446{
447 if (dmaPendingNum != 0 || readEvent.scheduled())
448 return;
449 readFramebuffer();
450}
451
452void
453Pl111::readFramebuffer()
454{
455 // initialization for dma read from frame buffer to dma buffer
456 uint32_t length = height * width;
457 if (startAddr != lcdUpbase)
458 startAddr = lcdUpbase;
459
460 // Updating base address, interrupt if we're supposed to
461 lcdRis.baseaddr = 1;
462 if (!intEvent.scheduled())
463 schedule(intEvent, clockEdge());
464
465 curAddr = 0;
466 startTime = curTick();
467
468 maxAddr = static_cast<Addr>(length * bytesPerPixel);
469
470 DPRINTF(PL111, " lcd frame buffer size of %d bytes \n", maxAddr);
471
472 fillFifo();
473}
474
475void
476Pl111::fillFifo()
477{
478 while ((dmaPendingNum < maxOutstandingDma) && (maxAddr >= curAddr + dmaSize )) {
479 // concurrent dma reads need different dma done events
480 // due to assertion in scheduling state
481 ++dmaPendingNum;
482
483 assert(!dmaDoneEventFree.empty());
484 DmaDoneEvent *event(dmaDoneEventFree.back());
485 dmaDoneEventFree.pop_back();
486 assert(!event->scheduled());
487
488 // We use a uncachable request here because the requests from the CPU
489 // will be uncacheable as well. If we have uncacheable and cacheable
490 // requests in the memory system for the same address it won't be
491 // pleased
492 dmaPort.dmaAction(MemCmd::ReadReq, curAddr + startAddr, dmaSize,
493 event, curAddr + dmaBuffer,
494 0, Request::UNCACHEABLE);
495 curAddr += dmaSize;
496 }
497}
498
499void
500Pl111::dmaDone()
501{
502 DPRINTF(PL111, "DMA Done\n");
503
504 Tick maxFrameTime = lcdTiming2.cpl * height * pixelClock;
505
506 --dmaPendingNum;
507
508 if (maxAddr == curAddr && !dmaPendingNum) {
509 if ((curTick() - startTime) > maxFrameTime) {
510 warn("CLCD controller buffer underrun, took %d ticks when should"
511 " have taken %d\n", curTick() - startTime, maxFrameTime);
512 lcdRis.underflow = 1;
513 if (!intEvent.scheduled())
514 schedule(intEvent, clockEdge());
515 }
516
517 assert(!readEvent.scheduled());
518 fb.copyIn(dmaBuffer, converter);
519 if (vnc)
520 vnc->setDirty();
521
522 if (enableCapture) {
523 DPRINTF(PL111, "-- write out frame buffer into bmp\n");
524
525 if (!pic)
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