gic_v3_cpu_interface.cc (14237:fa3f5209a8e8) gic_v3_cpu_interface.cc (14243:6116e1413f80)
1/*
2 * Copyright (c) 2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1609 unchanged lines hidden (view full) ---

1618
1619 isa->setMiscRegNoEffect(misc_reg, val);
1620
1621 if (do_virtual_update) {
1622 virtualUpdate();
1623 }
1624}
1625
1/*
2 * Copyright (c) 2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1609 unchanged lines hidden (view full) ---

1618
1619 isa->setMiscRegNoEffect(misc_reg, val);
1620
1621 if (do_virtual_update) {
1622 virtualUpdate();
1623 }
1624}
1625
1626RegVal
1627Gicv3CPUInterface::readBankedMiscReg(MiscRegIndex misc_reg) const
1628{
1629 return isa->readMiscRegNoEffect(
1630 isa->snsBankedIndex64(misc_reg, !isSecureBelowEL3()));
1631}
1632
1633void
1634Gicv3CPUInterface::setBankedMiscReg(MiscRegIndex misc_reg, RegVal val) const
1635{
1636 isa->setMiscRegNoEffect(
1637 isa->snsBankedIndex64(misc_reg, !isSecureBelowEL3()), val);
1638}
1639
1626int
1627Gicv3CPUInterface::virtualFindActive(uint32_t int_id) const
1628{
1629 for (uint32_t lr_idx = 0; lr_idx < VIRTUAL_NUM_LIST_REGS; lr_idx++) {
1630 ICH_LR_EL2 ich_lr_el2 =
1631 isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx);
1632
1633 if (((ich_lr_el2.State == ICH_LR_EL2_STATE_ACTIVE) ||

--- 923 unchanged lines hidden --- 		1640int
1641Gicv3CPUInterface::virtualFindActive(uint32_t int_id) const
1642{
1643 for (uint32_t lr_idx = 0; lr_idx < VIRTUAL_NUM_LIST_REGS; lr_idx++) {
1644 ICH_LR_EL2 ich_lr_el2 =
1645 isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx);
1646
1647 if (((ich_lr_el2.State == ICH_LR_EL2_STATE_ACTIVE) ||

--- 923 unchanged lines hidden ---