1/* 2 * Copyright (c) 2019 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 44 unchanged lines hidden (view full) --- 53 54Gicv3CPUInterface::Gicv3CPUInterface(Gicv3 * gic, uint32_t cpu_id) 55 : BaseISADevice(), 56 gic(gic), 57 redistributor(nullptr), 58 distributor(nullptr), 59 cpuId(cpu_id) 60{ |
61 hppi.prio = 0xff; 62 hppi.intid = Gicv3::INTID_SPURIOUS; |
63} 64 65void 66Gicv3CPUInterface::init() 67{ 68 redistributor = gic->getRedistributor(cpuId); 69 distributor = gic->getDistributor(); 70} 71 72void |
73Gicv3CPUInterface::setThreadContext(ThreadContext *tc) 74{ 75 maintenanceInterrupt = gic->params()->maint_int->get(tc); 76} 77 78bool 79Gicv3CPUInterface::getHCREL2FMO() const 80{ --- 2502 unchanged lines hidden --- |