99c99
< ArmISA::MiscReg
---
> RegVal
102c102
< ArmISA::MiscReg value = isa->readMiscRegNoEffect(misc_reg);
---
> RegVal value = isa->readMiscRegNoEffect(misc_reg);
238c238
< ArmISA::MiscReg lr =
---
> RegVal lr =
266c266
< ArmISA::MiscReg lr =
---
> RegVal lr =
343c343
< ArmISA::MiscReg ich_vmcr_el2 =
---
> RegVal ich_vmcr_el2 =
423c423
< ArmISA::MiscReg lr =
---
> RegVal lr =
476c476
< ArmISA::MiscReg lr =
---
> RegVal lr =
509c509
< ArmISA::MiscReg icc_sre_el3 =
---
> RegVal icc_sre_el3 =
516c516
< ArmISA::MiscReg icc_sre_el3 =
---
> RegVal icc_sre_el3 =
523c523
< ArmISA::MiscReg icc_sre_el2 =
---
> RegVal icc_sre_el2 =
591c591
< ArmISA::MiscReg ich_vmcr_el2 =
---
> RegVal ich_vmcr_el2 =
615c615
< ArmISA::MiscReg icc_ctlr_el1_ns =
---
> RegVal icc_ctlr_el1_ns =
617c617
< ArmISA::MiscReg icc_ctlr_el1_s =
---
> RegVal icc_ctlr_el1_s =
656c656
< ArmISA::MiscReg ich_hcr_el2 =
---
> RegVal ich_hcr_el2 =
658c658
< ArmISA::MiscReg ich_vmcr_el2 =
---
> RegVal ich_vmcr_el2 =
726c726
< ArmISA::MiscReg lr =
---
> RegVal lr =
767c767
< Gicv3CPUInterface::setMiscReg(int misc_reg, ArmISA::MiscReg val)
---
> Gicv3CPUInterface::setMiscReg(int misc_reg, RegVal val)
867c867
< ArmISA::MiscReg lr =
---
> RegVal lr =
944c944
< ArmISA::MiscReg lr =
---
> RegVal lr =
1118c1118
< ArmISA::MiscReg ich_vmcr_el2 =
---
> RegVal ich_vmcr_el2 =
1179c1179
< ArmISA::MiscReg old_val =
---
> RegVal old_val =
1187c1187
< ArmISA::MiscReg ich_vmcr_el2 =
---
> RegVal ich_vmcr_el2 =
1200c1200
< ArmISA::MiscReg icc_ctlr_el1_s =
---
> RegVal icc_ctlr_el1_s =
1202c1202
< ArmISA::MiscReg icc_ctlr_el1_ns =
---
> RegVal icc_ctlr_el1_ns =
1237c1237
< ArmISA::MiscReg old_icc_ctlr_el3 =
---
> RegVal old_icc_ctlr_el3 =
1260c1260
< ArmISA::MiscReg old_icc_pmr_el1 =
---
> RegVal old_icc_pmr_el1 =
1287c1287
< ArmISA::MiscReg ich_vmcr_el2 =
---
> RegVal ich_vmcr_el2 =
1307c1307
< ArmISA::MiscReg ich_vmcr_el2 =
---
> RegVal ich_vmcr_el2 =
1410c1410
< ArmISA::MiscReg icc_sre_el3 =
---
> RegVal icc_sre_el3 =
1454c1454
< ArmISA::MiscReg old_val = isa->readMiscRegNoEffect(misc_reg);
---
> RegVal old_val = isa->readMiscRegNoEffect(misc_reg);
1462c1462
< ArmISA::MiscReg old_val = isa->readMiscRegNoEffect(misc_reg);
---
> RegVal old_val = isa->readMiscRegNoEffect(misc_reg);
1520c1520
< ArmISA::MiscReg lr =
---
> RegVal lr =
1600c1600
< ArmISA::MiscReg apr;
---
> RegVal apr;
1628,1631c1628,1629
< ArmISA::MiscReg vapr0 =
< isa->readMiscRegNoEffect(MISCREG_ICH_AP0R0_EL2 + i);
< ArmISA::MiscReg vapr1 =
< isa->readMiscRegNoEffect(MISCREG_ICH_AP1R0_EL2 + i);
---
> RegVal vapr0 = isa->readMiscRegNoEffect(MISCREG_ICH_AP0R0_EL2 + i);
> RegVal vapr1 = isa->readMiscRegNoEffect(MISCREG_ICH_AP1R0_EL2 + i);
1665c1663
< ArmISA::MiscReg apr = isa->readMiscRegNoEffect(apr_idx);
---
> RegVal apr = isa->readMiscRegNoEffect(apr_idx);
1685c1683
< ArmISA::MiscReg lr = isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 +
---
> RegVal lr = isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 +
1694c1692
< ArmISA::MiscReg apr = isa->readMiscRegNoEffect(apr_idx);
---
> RegVal apr = isa->readMiscRegNoEffect(apr_idx);
1722c1720
< ArmISA::MiscReg lr = isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 +
---
> RegVal lr = isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 +
1793c1791
< ArmISA::MiscReg ich_vmcr_el2 =
---
> RegVal ich_vmcr_el2 =
1831,1832c1829
< ArmISA::MiscReg ich_vmcr_el2 =
< isa->readMiscRegNoEffect(MISCREG_ICH_VMCR_EL2);
---
> RegVal ich_vmcr_el2 = isa->readMiscRegNoEffect(MISCREG_ICH_VMCR_EL2);
1900c1897
< ArmISA::MiscReg ich_lr_el2 =
---
> RegVal ich_lr_el2 =
1912,1913c1909
< ArmISA::MiscReg ich_hcr_el2 =
< isa->readMiscRegNoEffect(MISCREG_ICH_HCR_EL2);
---
> RegVal ich_hcr_el2 = isa->readMiscRegNoEffect(MISCREG_ICH_HCR_EL2);
1943,1944c1939
< ArmISA::MiscReg ich_vmcr_el2 =
< isa->readMiscRegNoEffect(MISCREG_ICH_VMCR_EL2);
---
> RegVal ich_vmcr_el2 = isa->readMiscRegNoEffect(MISCREG_ICH_VMCR_EL2);
1954c1949
< ArmISA::MiscReg ich_lri_el2 =
---
> RegVal ich_lri_el2 =
1988,1989c1983
< ArmISA::MiscReg lr = isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 +
< lr_idx);
---
> RegVal lr = isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx);
2027c2021
< ArmISA::MiscReg vapr =
---
> RegVal vapr =
2046,2047c2040
< ArmISA::MiscReg ich_hcr_el2 =
< isa->readMiscRegNoEffect(MISCREG_ICH_HCR_EL2);
---
> RegVal ich_hcr_el2 = isa->readMiscRegNoEffect(MISCREG_ICH_HCR_EL2);
2269,2270c2262
< ArmISA::MiscReg lr =
< isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx);
---
> RegVal lr = isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx);
2288c2280
< ArmISA::MiscReg ich_hcr_el2 =
---
> RegVal ich_hcr_el2 =
2316,2319c2308,2309
< ArmISA::MiscReg ich_hcr_el2 =
< isa->readMiscRegNoEffect(MISCREG_ICH_HCR_EL2);
< ArmISA::MiscReg ich_vmcr_el2 =
< isa->readMiscRegNoEffect(MISCREG_ICH_VMCR_EL2);
---
> RegVal ich_hcr_el2 = isa->readMiscRegNoEffect(MISCREG_ICH_HCR_EL2);
> RegVal ich_vmcr_el2 = isa->readMiscRegNoEffect(MISCREG_ICH_VMCR_EL2);