1/*
2 * Copyright (c) 2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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65void
66Gicv3CPUInterface::init()
67{
68 redistributor = gic->getRedistributor(cpuId);
69 distributor = gic->getDistributor();
70}
71
72void
73Gicv3CPUInterface::setThreadContext(ThreadContext *tc)
74{
75 maintenanceInterrupt = gic->params()->maint_int->get(tc);
76}
77
78bool
79Gicv3CPUInterface::getHCREL2FMO() const
80{

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1838 } else if (int_id >= Gicv3Redistributor::SMALLEST_LPI_ID) {
1839 // LPI, Redistributor
1840 redistributor->setClrLPI(int_id, false);
1841 }
1842
1843 // By setting the priority to 0xff we are effectively
1844 // making the int_id not pending anymore at the cpu
1845 // interface.
1846 hppi.prio = 0xff;
1847 updateDistributor();
1848}
1849
1850void
1851Gicv3CPUInterface::virtualActivateIRQ(uint32_t lr_idx)
1852{
1853 // Update active priority registers.
1854 ICH_LR_EL2 ich_lr_el = isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 +

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