gic_v3.hh (13531:e6f1bf55d038) gic_v3.hh (13756:12aa26df8c2f)
1/*
2 * Copyright (c) 2018 Metempsy Technology Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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29 */
30
31#ifndef __DEV_ARM_GICV3_H__
32#define __DEV_ARM_GICV3_H__
33
34#include "dev/arm/base_gic.hh"
35#include "params/Gicv3.hh"
36
1/*
2 * Copyright (c) 2018 Metempsy Technology Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 20 unchanged lines hidden (view full) ---

29 */
30
31#ifndef __DEV_ARM_GICV3_H__
32#define __DEV_ARM_GICV3_H__
33
34#include "dev/arm/base_gic.hh"
35#include "params/Gicv3.hh"
36
37class Gicv3CPUInterface;
37class Gicv3Distributor;
38class Gicv3Redistributor;
38class Gicv3Distributor;
39class Gicv3Redistributor;
39class Gicv3CPUInterface;
40
41class Gicv3 : public BaseGic
42{
43 protected:
44
40
41class Gicv3 : public BaseGic
42{
43 protected:
44
45 typedef Gicv3Params Params;
45 Gicv3Distributor * distributor;
46 std::vector<Gicv3Redistributor *> redistributors;
47 std::vector<Gicv3CPUInterface *> cpuInterfaces;
48 AddrRange distRange;
49 AddrRange redistRange;
50 AddrRangeList addrRanges;
51
52 public:
53
46 Gicv3Distributor * distributor;
47 std::vector<Gicv3Redistributor *> redistributors;
48 std::vector<Gicv3CPUInterface *> cpuInterfaces;
49 AddrRange distRange;
50 AddrRange redistRange;
51 AddrRangeList addrRanges;
52
53 public:
54
54 // Special interrupt IDs
55 // Special interrupt IDs, as per SPEC 2.2.1 section
55 static const int INTID_SECURE = 1020;
56 static const int INTID_NONSECURE = 1021;
57 static const int INTID_SPURIOUS = 1023;
58
59 // Number of Software Generated Interrupts
60 static const int SGI_MAX = 16;
61 // Number of Private Peripheral Interrupts
62 static const int PPI_MAX = 16;
63
56 static const int INTID_SECURE = 1020;
57 static const int INTID_NONSECURE = 1021;
58 static const int INTID_SPURIOUS = 1023;
59
60 // Number of Software Generated Interrupts
61 static const int SGI_MAX = 16;
62 // Number of Private Peripheral Interrupts
63 static const int PPI_MAX = 16;
64
65 // Interrupt states for PPIs, SGIs and SPIs, as per SPEC 4.1.2 section
64 typedef enum {
65 INT_INACTIVE,
66 INT_PENDING,
67 INT_ACTIVE,
68 INT_ACTIVE_PENDING,
69 } IntStatus;
70
66 typedef enum {
67 INT_INACTIVE,
68 INT_PENDING,
69 INT_ACTIVE,
70 INT_ACTIVE_PENDING,
71 } IntStatus;
72
73 // Interrupt groups, as per SPEC section 4.6
71 typedef enum {
72 G0S,
73 G1S,
74 G1NS,
75 } GroupId;
76
77 typedef enum {
78 INT_LEVEL_SENSITIVE,
79 INT_EDGE_TRIGGERED,
80 } IntTriggerType;
81
74 typedef enum {
75 G0S,
76 G1S,
77 G1NS,
78 } GroupId;
79
80 typedef enum {
81 INT_LEVEL_SENSITIVE,
82 INT_EDGE_TRIGGERED,
83 } IntTriggerType;
84
82 typedef Gicv3Params Params;
85 protected:
83
86
84 const Params *
85 params() const
87 void clearInt(uint32_t int_id) override;
88 void clearPPInt(uint32_t int_id, uint32_t cpu) override;
89
90 inline AddrRangeList
91 getAddrRanges() const override
86 {
92 {
87 return dynamic_cast<const Params *>(_params);
93 return addrRanges;
88 }
89
94 }
95
90 Gicv3(const Params * p);
91 ~Gicv3();
92 void init() override;
93 void initState() override;
94
96 void init() override;
97 void initState() override;
98
95 AddrRangeList
96 getAddrRanges() const override
99 const Params *
100 params() const
97 {
101 {
98 return addrRanges;
102 return dynamic_cast<const Params *>(_params);
99 }
100
101 Tick read(PacketPtr pkt) override;
103 }
104
105 Tick read(PacketPtr pkt) override;
102 Tick write(PacketPtr pkt) override;
106 void reset();
103 void sendInt(uint32_t int_id) override;
107 void sendInt(uint32_t int_id) override;
104 void clearInt(uint32_t int_id) override;
105 void sendPPInt(uint32_t int_id, uint32_t cpu) override;
108 void sendPPInt(uint32_t int_id, uint32_t cpu) override;
106 void clearPPInt(uint32_t int_id, uint32_t cpu) override;
107
108 void serialize(CheckpointOut & cp) const override;
109 void unserialize(CheckpointIn & cp) override;
109 void serialize(CheckpointOut & cp) const override;
110 void unserialize(CheckpointIn & cp) override;
111 Tick write(PacketPtr pkt) override;
110
112
111 Gicv3Distributor *
112 getDistributor() const
113 {
114 return distributor;
115 }
113 public:
116
114
117 Gicv3CPUInterface *
115 Gicv3(const Params * p);
116 void deassertInt(uint32_t cpu, ArmISA::InterruptTypes int_type);
117
118 inline Gicv3CPUInterface *
118 getCPUInterface(int cpu_id) const
119 {
120 assert(cpu_id < cpuInterfaces.size() and cpuInterfaces[cpu_id]);
121 return cpuInterfaces[cpu_id];
122 }
123
119 getCPUInterface(int cpu_id) const
120 {
121 assert(cpu_id < cpuInterfaces.size() and cpuInterfaces[cpu_id]);
122 return cpuInterfaces[cpu_id];
123 }
124
124 Gicv3Redistributor *
125 inline Gicv3Distributor *
126 getDistributor() const
127 {
128 return distributor;
129 }
130
131 inline Gicv3Redistributor *
125 getRedistributor(ContextID context_id) const
126 {
127 assert(context_id < redistributors.size() and
128 redistributors[context_id]);
129 return redistributors[context_id];
130 }
131
132 getRedistributor(ContextID context_id) const
133 {
134 assert(context_id < redistributors.size() and
135 redistributors[context_id]);
136 return redistributors[context_id];
137 }
138
132 Gicv3Redistributor * getRedistributorByAffinity(uint32_t affinity);
139 Gicv3Redistributor *
140 getRedistributorByAffinity(uint32_t affinity) const;
133 void postInt(uint32_t cpu, ArmISA::InterruptTypes int_type);
141 void postInt(uint32_t cpu, ArmISA::InterruptTypes int_type);
134 void postDelayedInt(uint32_t cpu, ArmISA::InterruptTypes int_type);
135 void deassertInt(uint32_t cpu, ArmISA::InterruptTypes int_type);
136
137 protected:
138
139 void reset();
140};
141
142#endif //__DEV_ARM_GICV3_H__
142};
143
144#endif //__DEV_ARM_GICV3_H__