1/*
2 * Copyright (c) 2010, 2013, 2015-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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70 GICD_PIDR0 = 0xfe0, // distributor peripheral ID0
71 GICD_PIDR1 = 0xfe4, // distributor peripheral ID1
72 GICD_PIDR2 = 0xfe8, // distributor peripheral ID2
73 GICD_PIDR3 = 0xfec, // distributor peripheral ID3
74
75 DIST_SIZE = 0x1000,
76 };
77
78 const uint32_t gicdPIDR;
79 const uint32_t gicdIIDR;
80 const uint32_t giccIIDR;
81
82 static const AddrRange GICD_IGROUPR; // interrupt group (unimplemented)
83 static const AddrRange GICD_ISENABLER; // interrupt set enable
84 static const AddrRange GICD_ICENABLER; // interrupt clear enable
85 static const AddrRange GICD_ISPENDR; // set pending interrupt
86 static const AddrRange GICD_ICPENDR; // clear pending interrupt
87 static const AddrRange GICD_ISACTIVER; // active bit registers
88 static const AddrRange GICD_ICACTIVER; // clear bit registers

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