generic_timer.cc (12156:5ca7617f41b3) generic_timer.cc (12392:e0dbdf30a2a5)
1/*
2 * Copyright (c) 2013, 2015, 2017 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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380 core.virt.setControl(val);
381 return;
382
383 // PL1 phys. timer, secure
384 case MISCREG_CNTP_CTL_S:
385 case MISCREG_CNTPS_CVAL_EL1:
386 case MISCREG_CNTPS_TVAL_EL1:
387 case MISCREG_CNTPS_CTL_EL1:
1/*
2 * Copyright (c) 2013, 2015, 2017 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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380 core.virt.setControl(val);
381 return;
382
383 // PL1 phys. timer, secure
384 case MISCREG_CNTP_CTL_S:
385 case MISCREG_CNTPS_CVAL_EL1:
386 case MISCREG_CNTPS_TVAL_EL1:
387 case MISCREG_CNTPS_CTL_EL1:
388 /* FALLTHROUGH */
388 M5_FALLTHROUGH;
389
390 // PL2 phys. timer, non-secure
391 case MISCREG_CNTHCTL:
392 case MISCREG_CNTHCTL_EL2:
393 case MISCREG_CNTHP_CVAL:
394 case MISCREG_CNTHP_CVAL_EL2:
395 case MISCREG_CNTHP_TVAL:
396 case MISCREG_CNTHP_TVAL_EL2:

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461 case MISCREG_CNTV_CTL_EL0:
462 return core.virt.control();
463
464 // PL1 phys. timer, secure
465 case MISCREG_CNTP_CTL_S:
466 case MISCREG_CNTPS_CVAL_EL1:
467 case MISCREG_CNTPS_TVAL_EL1:
468 case MISCREG_CNTPS_CTL_EL1:
389
390 // PL2 phys. timer, non-secure
391 case MISCREG_CNTHCTL:
392 case MISCREG_CNTHCTL_EL2:
393 case MISCREG_CNTHP_CVAL:
394 case MISCREG_CNTHP_CVAL_EL2:
395 case MISCREG_CNTHP_TVAL:
396 case MISCREG_CNTHP_TVAL_EL2:

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461 case MISCREG_CNTV_CTL_EL0:
462 return core.virt.control();
463
464 // PL1 phys. timer, secure
465 case MISCREG_CNTP_CTL_S:
466 case MISCREG_CNTPS_CVAL_EL1:
467 case MISCREG_CNTPS_TVAL_EL1:
468 case MISCREG_CNTPS_CTL_EL1:
469 /* FALLTHROUGH */
469 M5_FALLTHROUGH;
470
471 // PL2 phys. timer, non-secure
472 case MISCREG_CNTHCTL:
473 case MISCREG_CNTHCTL_EL2:
474 case MISCREG_CNTHP_CVAL:
475 case MISCREG_CNTHP_CVAL_EL2:
476 case MISCREG_CNTHP_TVAL:
477 case MISCREG_CNTHP_TVAL_EL2:

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471 // PL2 phys. timer, non-secure
472 case MISCREG_CNTHCTL:
473 case MISCREG_CNTHCTL_EL2:
474 case MISCREG_CNTHP_CVAL:
475 case MISCREG_CNTHP_CVAL_EL2:
476 case MISCREG_CNTHP_TVAL:
477 case MISCREG_CNTHP_TVAL_EL2:

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