generic_timer.cc (12102:909ed81fd533) generic_timer.cc (12156:5ca7617f41b3)
1/*
2 * Copyright (c) 2013, 2015, 2017 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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313 new CoreTimers(*this, system, i, irqPhys, irqVirt));
314 }
315}
316
317
318void
319GenericTimer::setMiscReg(int reg, unsigned cpu, MiscReg val)
320{
1/*
2 * Copyright (c) 2013, 2015, 2017 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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313 new CoreTimers(*this, system, i, irqPhys, irqVirt));
314 }
315}
316
317
318void
319GenericTimer::setMiscReg(int reg, unsigned cpu, MiscReg val)
320{
321 // This method might have been called from another context if we
322 // are running in multi-core KVM. Migrate to the SimObject's event
323 // queue to prevent surprising race conditions.
324 EventQueue::ScopedMigration migrate(eventQueue());
325
326 CoreTimers &core(getTimers(cpu));
327
328 switch (reg) {
329 case MISCREG_CNTFRQ:
330 case MISCREG_CNTFRQ_EL0:
331 systemCounter.setFreq(val);
332 return;
333

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410 return;
411 }
412}
413
414
415MiscReg
416GenericTimer::readMiscReg(int reg, unsigned cpu)
417{
321 CoreTimers &core(getTimers(cpu));
322
323 switch (reg) {
324 case MISCREG_CNTFRQ:
325 case MISCREG_CNTFRQ_EL0:
326 systemCounter.setFreq(val);
327 return;
328

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405 return;
406 }
407}
408
409
410MiscReg
411GenericTimer::readMiscReg(int reg, unsigned cpu)
412{
418 // This method might have been called from another context if we
419 // are running in multi-core KVM. Migrate to the SimObject's event
420 // queue to prevent surprising race conditions.
421 EventQueue::ScopedMigration migrate(eventQueue());
422
423 CoreTimers &core(getTimers(cpu));
424
425 switch (reg) {
426 case MISCREG_CNTFRQ:
427 case MISCREG_CNTFRQ_EL0:
428 return systemCounter.freq();
429
430 case MISCREG_CNTKCTL:

--- 411 unchanged lines hidden --- 		413 CoreTimers &core(getTimers(cpu));
414
415 switch (reg) {
416 case MISCREG_CNTFRQ:
417 case MISCREG_CNTFRQ_EL0:
418 return systemCounter.freq();
419
420 case MISCREG_CNTKCTL:

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