1/*
2 * Copyright (c) 2012-2013, 2017-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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41 * Base class for ARM GIC implementations
42 */
43
44#ifndef __DEV_ARM_BASE_GIC_H__
45#define __DEV_ARM_BASE_GIC_H__
46
47#include <unordered_map>
48
49#include "dev/io_device.hh"
50
51class Platform;
52class RealView;
53class ThreadContext;
54class ArmInterruptPin;
55class ArmSPI;
56class ArmPPI;

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62
63class BaseGic : public PioDevice
64{
65 public:
66 typedef BaseGicParams Params;
67
68 BaseGic(const Params *p);
69 virtual ~BaseGic();
70
71 const Params * params() const;
72
73 /**
74 * Post an interrupt from a device that is connected to the GIC.
75 *
76 * Depending on the configuration, the GIC will pass this interrupt
77 * on through to a CPU.

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94 *
95 * Depending on the configuration, the GIC may de-assert it's CPU
96 * line.
97 *
98 * @param num number of interrupt to send
99 */
100 virtual void clearInt(uint32_t num) = 0;
101
102 protected:
103 /** Platform this GIC belongs to. */
104 Platform *platform;
105};
106
107class BaseGicRegisters
108{
109 public:

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