a9scu.cc (13230:2988dc5d1d6f) a9scu.cc (14082:955d36e0ab98)
1/*
1/*
2 * Copyright (c) 2010 ARM Limited
2 * Copyright (c) 2010,2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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68 * expansion like this.
69 */
70 if (sys->numContexts() > 4) {
71 warn_once("A9SCU with >4 CPUs is unsupported\n");
72 if (sys->numContexts() > 15)
73 fatal("Too many CPUs (%d) for A9SCU!\n", sys->numContexts());
74 }
75 int smp_bits, core_cnt;
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

--- 57 unchanged lines hidden (view full) ---

68 * expansion like this.
69 */
70 if (sys->numContexts() > 4) {
71 warn_once("A9SCU with >4 CPUs is unsupported\n");
72 if (sys->numContexts() > 15)
73 fatal("Too many CPUs (%d) for A9SCU!\n", sys->numContexts());
74 }
75 int smp_bits, core_cnt;
76 smp_bits = power(2,sys->numContexts()) - 1;
76 smp_bits = (1 << sys->numContexts()) - 1;
77 core_cnt = sys->numContexts() - 1;
78 pkt->setLE(smp_bits << 4 | core_cnt);
79 break;
80 default:
81 // Only configuration register is implemented
82 panic("Tried to read SCU at offset %#x\n", daddr);
83 break;
84 }

--- 26 unchanged lines hidden --- 		77 core_cnt = sys->numContexts() - 1;
78 pkt->setLE(smp_bits << 4 | core_cnt);
79 break;
80 default:
81 // Only configuration register is implemented
82 panic("Tried to read SCU at offset %#x\n", daddr);
83 break;
84 }

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