SConscript (14039:4991b2a345a1) SConscript (14283:b02cde4661e1)
1# -*- mode:python -*-
2
3# Copyright (c) 2009, 2012-2013 ARM Limited
4# All rights reserved.
5#
6# The license below extends only to copyright in the software and shall
7# not be construed as granting a license to any other intellectual
8# property including but not limited to intellectual property relating
9# to a hardware implementation of the functionality of the software
10# licensed hereunder. You may use the software subject to the license
11# terms below provided that you ensure that this notice is replicated
12# unmodified and in its entirety in all distributions of the software,
13# modified or unmodified, in source code or in binary form.
14#
15# Redistribution and use in source and binary forms, with or without
16# modification, are permitted provided that the following conditions are
17# met: redistributions of source code must retain the above copyright
18# notice, this list of conditions and the following disclaimer;
19# redistributions in binary form must reproduce the above copyright
20# notice, this list of conditions and the following disclaimer in the
21# documentation and/or other materials provided with the distribution;
22# neither the name of the copyright holders nor the names of its
23# contributors may be used to endorse or promote products derived from
24# this software without specific prior written permission.
25#
26# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37#
38# Authors: Ali Saidi
39
40Import('*')
41
42if env['TARGET_ISA'] == 'arm':
43 SimObject('AbstractNVM.py')
1# -*- mode:python -*-
2
3# Copyright (c) 2009, 2012-2013 ARM Limited
4# All rights reserved.
5#
6# The license below extends only to copyright in the software and shall
7# not be construed as granting a license to any other intellectual
8# property including but not limited to intellectual property relating
9# to a hardware implementation of the functionality of the software
10# licensed hereunder. You may use the software subject to the license
11# terms below provided that you ensure that this notice is replicated
12# unmodified and in its entirety in all distributions of the software,
13# modified or unmodified, in source code or in binary form.
14#
15# Redistribution and use in source and binary forms, with or without
16# modification, are permitted provided that the following conditions are
17# met: redistributions of source code must retain the above copyright
18# notice, this list of conditions and the following disclaimer;
19# redistributions in binary form must reproduce the above copyright
20# notice, this list of conditions and the following disclaimer in the
21# documentation and/or other materials provided with the distribution;
22# neither the name of the copyright holders nor the names of its
23# contributors may be used to endorse or promote products derived from
24# this software without specific prior written permission.
25#
26# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37#
38# Authors: Ali Saidi
39
40Import('*')
41
42if env['TARGET_ISA'] == 'arm':
43 SimObject('AbstractNVM.py')
44 SimObject('Display.py')
44 SimObject('FlashDevice.py')
45 SimObject('Gic.py')
46 SimObject('RealView.py')
47 SimObject('SMMUv3.py')
48 SimObject('UFSHostDevice.py')
49 SimObject('EnergyCtrl.py')
50 SimObject('NoMali.py')
51 SimObject('VirtIOMMIO.py')
52
53 Source('a9scu.cc')
54 Source('amba_device.cc')
55 Source('amba_fake.cc')
56 Source('base_gic.cc')
45 SimObject('FlashDevice.py')
46 SimObject('Gic.py')
47 SimObject('RealView.py')
48 SimObject('SMMUv3.py')
49 SimObject('UFSHostDevice.py')
50 SimObject('EnergyCtrl.py')
51 SimObject('NoMali.py')
52 SimObject('VirtIOMMIO.py')
53
54 Source('a9scu.cc')
55 Source('amba_device.cc')
56 Source('amba_fake.cc')
57 Source('base_gic.cc')
58 Source('display.cc')
57 Source('flash_device.cc')
58 Source('generic_timer.cc')
59 Source('gic_v2.cc')
60 Source('gic_v2m.cc')
61 Source('gic_v3.cc')
62 Source('gic_v3_cpu_interface.cc')
63 Source('gic_v3_distributor.cc')
64 Source('gic_v3_redistributor.cc')
65 Source('gic_v3_its.cc')
66 Source('pl011.cc')
67 Source('pl111.cc')
68 Source('hdlcd.cc')
69 Source('kmi.cc')
70 Source('smmu_v3.cc');
71 Source('smmu_v3_caches.cc');
72 Source('smmu_v3_cmdexec.cc');
73 Source('smmu_v3_events.cc');
74 Source('smmu_v3_ports.cc');
75 Source('smmu_v3_proc.cc');
76 Source('smmu_v3_ptops.cc');
77 Source('smmu_v3_slaveifc.cc');
78 Source('smmu_v3_transl.cc');
79 Source('timer_sp804.cc')
80 Source('gpu_nomali.cc')
81 Source('pci_host.cc')
82 Source('rv_ctrl.cc')
83 Source('realview.cc')
84 Source('rtc_pl031.cc')
85 Source('timer_cpulocal.cc')
86 Source('timer_a9global.cc')
87 Source('vgic.cc')
88 Source('vio_mmio.cc')
89 Source('ufs_device.cc')
90 Source('energy_ctrl.cc')
91
92 DebugFlag('AMBA')
93 DebugFlag('FlashDevice')
94 DebugFlag('HDLcd')
95 DebugFlag('PL111')
96 DebugFlag('GICV2M')
97 DebugFlag('Pl050')
98 DebugFlag('GIC')
99 DebugFlag('ITS')
100 DebugFlag('RVCTRL')
101 DebugFlag('SMMUv3')
102 DebugFlag('SMMUv3Hazard')
103 DebugFlag('EnergyCtrl')
104 DebugFlag('UFSHostDevice')
105 DebugFlag('VGIC')
106 DebugFlag('NoMali')
59 Source('flash_device.cc')
60 Source('generic_timer.cc')
61 Source('gic_v2.cc')
62 Source('gic_v2m.cc')
63 Source('gic_v3.cc')
64 Source('gic_v3_cpu_interface.cc')
65 Source('gic_v3_distributor.cc')
66 Source('gic_v3_redistributor.cc')
67 Source('gic_v3_its.cc')
68 Source('pl011.cc')
69 Source('pl111.cc')
70 Source('hdlcd.cc')
71 Source('kmi.cc')
72 Source('smmu_v3.cc');
73 Source('smmu_v3_caches.cc');
74 Source('smmu_v3_cmdexec.cc');
75 Source('smmu_v3_events.cc');
76 Source('smmu_v3_ports.cc');
77 Source('smmu_v3_proc.cc');
78 Source('smmu_v3_ptops.cc');
79 Source('smmu_v3_slaveifc.cc');
80 Source('smmu_v3_transl.cc');
81 Source('timer_sp804.cc')
82 Source('gpu_nomali.cc')
83 Source('pci_host.cc')
84 Source('rv_ctrl.cc')
85 Source('realview.cc')
86 Source('rtc_pl031.cc')
87 Source('timer_cpulocal.cc')
88 Source('timer_a9global.cc')
89 Source('vgic.cc')
90 Source('vio_mmio.cc')
91 Source('ufs_device.cc')
92 Source('energy_ctrl.cc')
93
94 DebugFlag('AMBA')
95 DebugFlag('FlashDevice')
96 DebugFlag('HDLcd')
97 DebugFlag('PL111')
98 DebugFlag('GICV2M')
99 DebugFlag('Pl050')
100 DebugFlag('GIC')
101 DebugFlag('ITS')
102 DebugFlag('RVCTRL')
103 DebugFlag('SMMUv3')
104 DebugFlag('SMMUv3Hazard')
105 DebugFlag('EnergyCtrl')
106 DebugFlag('UFSHostDevice')
107 DebugFlag('VGIC')
108 DebugFlag('NoMali')