Cross Reference: /gem5/src/dev/arm/RealView.py

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RealView.py (9646:7a0c51f14095)	RealView.py (9707:1305bec2733f)
1# Copyright (c) 2009-2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 148 unchanged lines hidden (view full) --- 157 cxx_header = "dev/arm/realview.hh" 158 system = Param.System(Parent.any, "system") 159 pci_cfg_base = Param.Addr(0, "Base address of PCI Configuraiton Space") 160 mem_start_addr = Param.Addr(0, "Start address of main memory") 161 max_mem_size = Param.Addr('256MB', "Maximum amount of RAM supported by platform") 162 163 def setupBootLoader(self, mem_bus, cur_sys, loc): 164 self.nvmem = SimpleMemory(range = AddrRange(Addr('2GB'),	1# Copyright (c) 2009-2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 148 unchanged lines hidden (view full) --- 157 cxx_header = "dev/arm/realview.hh" 158 system = Param.System(Parent.any, "system") 159 pci_cfg_base = Param.Addr(0, "Base address of PCI Configuraiton Space") 160 mem_start_addr = Param.Addr(0, "Start address of main memory") 161 max_mem_size = Param.Addr('256MB', "Maximum amount of RAM supported by platform") 162 163 def setupBootLoader(self, mem_bus, cur_sys, loc): 164 self.nvmem = SimpleMemory(range = AddrRange(Addr('2GB'),
165 size = '64MB'), 166 zero = True)	165 size = '64MB'))
167 self.nvmem.port = mem_bus.master 168 cur_sys.boot_loader = loc('boot.arm') 169 170 171# Reference for memory map and interrupt number 172# RealView Platform Baseboard Explore for Cortex-A9 User Guide(ARM DUI 0440A) 173# Chapter 4: Programmer's Reference 174class RealViewPBX(RealView): --- 180 unchanged lines hidden (view full) --- 355 pciconfig = PciConfigAll(size='256MB') 356 ethernet = IGbE_e1000(pci_bus=0, pci_dev=0, pci_func=0, 357 InterruptLine=1, InterruptPin=1) 358 359 ide = IdeController(disks = [], pci_bus=0, pci_dev=1, pci_func=0, 360 InterruptLine=2, InterruptPin=2) 361 362	166 self.nvmem.port = mem_bus.master 167 cur_sys.boot_loader = loc('boot.arm') 168 169 170# Reference for memory map and interrupt number 171# RealView Platform Baseboard Explore for Cortex-A9 User Guide(ARM DUI 0440A) 172# Chapter 4: Programmer's Reference 173class RealViewPBX(RealView): --- 180 unchanged lines hidden (view full) --- 354 pciconfig = PciConfigAll(size='256MB') 355 ethernet = IGbE_e1000(pci_bus=0, pci_dev=0, pci_func=0, 356 InterruptLine=1, InterruptPin=1) 357 358 ide = IdeController(disks = [], pci_bus=0, pci_dev=1, pci_func=0, 359 InterruptLine=2, InterruptPin=2) 360 361
363 vram = SimpleMemory(range = AddrRange(0x18000000, size='32MB'), 364 zero = True)	362 vram = SimpleMemory(range = AddrRange(0x18000000, size='32MB'))
365 rtc = PL031(pio_addr=0x1C170000, int_num=36) 366 367 l2x0_fake = IsaFake(pio_addr=0x2C100000, pio_size=0xfff) 368 uart1_fake = AmbaFake(pio_addr=0x1C0A0000) 369 uart2_fake = AmbaFake(pio_addr=0x1C0B0000) 370 uart3_fake = AmbaFake(pio_addr=0x1C0C0000) 371 sp810_fake = AmbaFake(pio_addr=0x1C020000, ignore_access=True) 372 watchdog_fake = AmbaFake(pio_addr=0x1C0F0000) 373 aaci_fake = AmbaFake(pio_addr=0x1C040000) 374 lan_fake = IsaFake(pio_addr=0x1A000000, pio_size=0xffff) 375 usb_fake = IsaFake(pio_addr=0x1B000000, pio_size=0x1ffff) 376 mmc_fake = AmbaFake(pio_addr=0x1c050000) 377 378 def setupBootLoader(self, mem_bus, cur_sys, loc):	363 rtc = PL031(pio_addr=0x1C170000, int_num=36) 364 365 l2x0_fake = IsaFake(pio_addr=0x2C100000, pio_size=0xfff) 366 uart1_fake = AmbaFake(pio_addr=0x1C0A0000) 367 uart2_fake = AmbaFake(pio_addr=0x1C0B0000) 368 uart3_fake = AmbaFake(pio_addr=0x1C0C0000) 369 sp810_fake = AmbaFake(pio_addr=0x1C020000, ignore_access=True) 370 watchdog_fake = AmbaFake(pio_addr=0x1C0F0000) 371 aaci_fake = AmbaFake(pio_addr=0x1C040000) 372 lan_fake = IsaFake(pio_addr=0x1A000000, pio_size=0xffff) 373 usb_fake = IsaFake(pio_addr=0x1B000000, pio_size=0x1ffff) 374 mmc_fake = AmbaFake(pio_addr=0x1c050000) 375 376 def setupBootLoader(self, mem_bus, cur_sys, loc):
379 self.nvmem = SimpleMemory(range = AddrRange(0, size = '64MB'), 380 zero = True)	377 self.nvmem = SimpleMemory(range = AddrRange(0, size = '64MB'))
381 self.nvmem.port = mem_bus.master 382 cur_sys.boot_loader = loc('boot_emm.arm') 383 cur_sys.atags_addr = 0x80000100 384 385 # Attach I/O devices that are on chip and also set the appropriate 386 # ranges for the bridge 387 def attachOnChipIO(self, bus, bridge): 388 self.gic.pio = bus.master --- 49 unchanged lines hidden ---	378 self.nvmem.port = mem_bus.master 379 cur_sys.boot_loader = loc('boot_emm.arm') 380 cur_sys.atags_addr = 0x80000100 381 382 # Attach I/O devices that are on chip and also set the appropriate 383 # ranges for the bridge 384 def attachOnChipIO(self, bus, bridge): 385 self.gic.pio = bus.master --- 49 unchanged lines hidden ---