RealView.py (8742:9df38d259935) RealView.py (8799:dac1e33e07b0)
1# Copyright (c) 2009 ARM Limited
1# Copyright (c) 2009-2011 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated

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173 gpio2_fake = AmbaFake(pio_addr=0x10015000)
174 ssp_fake = AmbaFake(pio_addr=0x1000d000)
175 sci_fake = AmbaFake(pio_addr=0x1000e000)
176 aaci_fake = AmbaFake(pio_addr=0x10004000)
177 mmc_fake = AmbaFake(pio_addr=0x10005000)
178 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031)
179
180
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated

--- 163 unchanged lines hidden (view full) ---

173 gpio2_fake = AmbaFake(pio_addr=0x10015000)
174 ssp_fake = AmbaFake(pio_addr=0x1000d000)
175 sci_fake = AmbaFake(pio_addr=0x1000e000)
176 aaci_fake = AmbaFake(pio_addr=0x10004000)
177 mmc_fake = AmbaFake(pio_addr=0x10005000)
178 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031)
179
180
181 # Attach I/O devices that are on chip
182 def attachOnChipIO(self, bus):
181 # Attach I/O devices that are on chip and also set the appropriate
182 # ranges for the bridge
183 def attachOnChipIO(self, bus, bridge):
183 self.gic.pio = bus.port
184 self.l2x0_fake.pio = bus.port
185 self.a9scu.pio = bus.port
186 self.local_cpu_timer.pio = bus.port
184 self.gic.pio = bus.port
185 self.l2x0_fake.pio = bus.port
186 self.a9scu.pio = bus.port
187 self.local_cpu_timer.pio = bus.port
188 # Bridge ranges based on excluding what is part of on-chip I/O
189 # (gic, l2x0, a9scu, local_cpu_timer)
190 bridge.ranges = [AddrRange(self.realview_io.pio_addr,
191 self.a9scu.pio_addr - 1),
192 AddrRange(self.flash_fake.pio_addr, Addr.max)]
187
188 # Attach I/O devices to specified bus object. Can't do this
189 # earlier, since the bus object itself is typically defined at the
190 # System level.
191 def attachIO(self, bus):
192 self.uart.pio = bus.port
193 self.realview_io.pio = bus.port
194 self.timer0.pio = bus.port
195 self.timer1.pio = bus.port
196 self.clcd.pio = bus.port
193
194 # Attach I/O devices to specified bus object. Can't do this
195 # earlier, since the bus object itself is typically defined at the
196 # System level.
197 def attachIO(self, bus):
198 self.uart.pio = bus.port
199 self.realview_io.pio = bus.port
200 self.timer0.pio = bus.port
201 self.timer1.pio = bus.port
202 self.clcd.pio = bus.port
203 self.clcd.dma = bus.port
197 self.kmi0.pio = bus.port
198 self.kmi1.pio = bus.port
199 self.cf_ctrl.pio = bus.port
204 self.kmi0.pio = bus.port
205 self.kmi1.pio = bus.port
206 self.cf_ctrl.pio = bus.port
207 self.cf_ctrl.config = bus.port
208 self.cf_ctrl.dma = bus.port
200 self.dmac_fake.pio = bus.port
201 self.uart1_fake.pio = bus.port
202 self.uart2_fake.pio = bus.port
203 self.uart3_fake.pio = bus.port
204 self.smc_fake.pio = bus.port
205 self.sp810_fake.pio = bus.port
206 self.watchdog_fake.pio = bus.port
207 self.gpio0_fake.pio = bus.port

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244 ssp_fake = AmbaFake(pio_addr=0x1000d000)
245 sci_fake = AmbaFake(pio_addr=0x1000e000)
246 aaci_fake = AmbaFake(pio_addr=0x10004000)
247 mmc_fake = AmbaFake(pio_addr=0x10005000)
248 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031)
249
250
251
209 self.dmac_fake.pio = bus.port
210 self.uart1_fake.pio = bus.port
211 self.uart2_fake.pio = bus.port
212 self.uart3_fake.pio = bus.port
213 self.smc_fake.pio = bus.port
214 self.sp810_fake.pio = bus.port
215 self.watchdog_fake.pio = bus.port
216 self.gpio0_fake.pio = bus.port

--- 36 unchanged lines hidden (view full) ---

253 ssp_fake = AmbaFake(pio_addr=0x1000d000)
254 sci_fake = AmbaFake(pio_addr=0x1000e000)
255 aaci_fake = AmbaFake(pio_addr=0x10004000)
256 mmc_fake = AmbaFake(pio_addr=0x10005000)
257 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031)
258
259
260
252 # Attach I/O devices that are on chip
253 def attachOnChipIO(self, bus):
261 # Attach I/O devices that are on chip and also set the appropriate
262 # ranges for the bridge
263 def attachOnChipIO(self, bus, bridge):
254 self.gic.pio = bus.port
255 self.l2x0_fake.pio = bus.port
264 self.gic.pio = bus.port
265 self.l2x0_fake.pio = bus.port
266 # Bridge ranges based on excluding what is part of on-chip I/O
267 # (gic, l2x0)
268 bridge.ranges = [AddrRange(self.realview_io.pio_addr,
269 self.gic.cpu_addr - 1),
270 AddrRange(self.flash_fake.pio_addr, Addr.max)]
256
257 # Attach I/O devices to specified bus object. Can't do this
258 # earlier, since the bus object itself is typically defined at the
259 # System level.
260 def attachIO(self, bus):
261 self.uart.pio = bus.port
262 self.realview_io.pio = bus.port
263 self.timer0.pio = bus.port
264 self.timer1.pio = bus.port
265 self.clcd.pio = bus.port
271
272 # Attach I/O devices to specified bus object. Can't do this
273 # earlier, since the bus object itself is typically defined at the
274 # System level.
275 def attachIO(self, bus):
276 self.uart.pio = bus.port
277 self.realview_io.pio = bus.port
278 self.timer0.pio = bus.port
279 self.timer1.pio = bus.port
280 self.clcd.pio = bus.port
281 self.clcd.dma = bus.port
266 self.kmi0.pio = bus.port
267 self.kmi1.pio = bus.port
268 self.dmac_fake.pio = bus.port
269 self.uart1_fake.pio = bus.port
270 self.uart2_fake.pio = bus.port
271 self.uart3_fake.pio = bus.port
272 self.smc_fake.pio = bus.port
273 self.sp810_fake.pio = bus.port

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325 elba_aaci_fake = AmbaFake(pio_addr=0xE0004000)
326 mmc_fake = AmbaFake(pio_addr=0xE0005000) # not sure if we need this
327 rtc_fake = AmbaFake(pio_addr=0xE0017000, amba_id=0x41031)
328 spsc_fake = IsaFake(pio_addr=0xE001B000, pio_size=0x2000)
329 lan_fake = IsaFake(pio_addr=0xFA000000, pio_size=0xffff)
330 usb_fake = IsaFake(pio_addr=0xFB000000, pio_size=0x1ffff)
331
332
282 self.kmi0.pio = bus.port
283 self.kmi1.pio = bus.port
284 self.dmac_fake.pio = bus.port
285 self.uart1_fake.pio = bus.port
286 self.uart2_fake.pio = bus.port
287 self.uart3_fake.pio = bus.port
288 self.smc_fake.pio = bus.port
289 self.sp810_fake.pio = bus.port

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341 elba_aaci_fake = AmbaFake(pio_addr=0xE0004000)
342 mmc_fake = AmbaFake(pio_addr=0xE0005000) # not sure if we need this
343 rtc_fake = AmbaFake(pio_addr=0xE0017000, amba_id=0x41031)
344 spsc_fake = IsaFake(pio_addr=0xE001B000, pio_size=0x2000)
345 lan_fake = IsaFake(pio_addr=0xFA000000, pio_size=0xffff)
346 usb_fake = IsaFake(pio_addr=0xFB000000, pio_size=0x1ffff)
347
348
333 # Attach I/O devices that are on chip
334 def attachOnChipIO(self, bus):
349 # Attach I/O devices that are on chip and also set the appropriate
350 # ranges for the bridge
351 def attachOnChipIO(self, bus, bridge):
335 self.gic.pio = bus.port
336 self.a9scu.pio = bus.port
352 self.gic.pio = bus.port
353 self.a9scu.pio = bus.port
354 # Bridge ranges based on excluding what is part of on-chip I/O
355 # (gic, a9scu)
356 bridge.ranges = [AddrRange(self.pci_cfg_base, self.a9scu.pio_addr - 1),
357 AddrRange(self.local_cpu_timer.pio_addr, Addr.max)]
337
338 # Attach I/O devices to specified bus object. Can't do this
339 # earlier, since the bus object itself is typically defined at the
340 # System level.
341 def attachIO(self, bus):
342 self.elba_uart.pio = bus.port
343 self.uart.pio = bus.port
344 self.realview_io.pio = bus.port
345 self.local_cpu_timer.pio = bus.port
346 self.v2m_timer0.pio = bus.port
347 self.v2m_timer1.pio = bus.port
348 self.elba_timer0.pio = bus.port
349 self.elba_timer1.pio = bus.port
350 self.clcd.pio = bus.port
358
359 # Attach I/O devices to specified bus object. Can't do this
360 # earlier, since the bus object itself is typically defined at the
361 # System level.
362 def attachIO(self, bus):
363 self.elba_uart.pio = bus.port
364 self.uart.pio = bus.port
365 self.realview_io.pio = bus.port
366 self.local_cpu_timer.pio = bus.port
367 self.v2m_timer0.pio = bus.port
368 self.v2m_timer1.pio = bus.port
369 self.elba_timer0.pio = bus.port
370 self.elba_timer1.pio = bus.port
371 self.clcd.pio = bus.port
372 self.clcd.dma = bus.port
351 self.kmi0.pio = bus.port
352 self.kmi1.pio = bus.port
353 self.elba_kmi0.pio = bus.port
354 self.elba_kmi1.pio = bus.port
355 self.cf_ctrl.pio = bus.port
373 self.kmi0.pio = bus.port
374 self.kmi1.pio = bus.port
375 self.elba_kmi0.pio = bus.port
376 self.elba_kmi1.pio = bus.port
377 self.cf_ctrl.pio = bus.port
378 self.cf_ctrl.config = bus.port
379 self.cf_ctrl.dma = bus.port
356 self.ide.pio = bus.port
380 self.ide.pio = bus.port
381 self.ide.config = bus.port
382 self.ide.dma = bus.port
357 self.ethernet.pio = bus.port
383 self.ethernet.pio = bus.port
384 self.ethernet.config = bus.port
385 self.ethernet.dma = bus.port
358 self.pciconfig.pio = bus.default
359 bus.use_default_range = True
360
361 self.l2x0_fake.pio = bus.port
362 self.dmac_fake.pio = bus.port
363 self.uart1_fake.pio = bus.port
364 self.uart2_fake.pio = bus.port
365 self.uart3_fake.pio = bus.port
366 self.smc_fake.pio = bus.port
367 self.sp810_fake.pio = bus.port
368 self.watchdog_fake.pio = bus.port
369 self.aaci_fake.pio = bus.port
370 self.elba_aaci_fake.pio = bus.port
371 self.mmc_fake.pio = bus.port
372 self.rtc_fake.pio = bus.port
373 self.spsc_fake.pio = bus.port
374 self.lan_fake.pio = bus.port
375 self.usb_fake.pio = bus.port
376
386 self.pciconfig.pio = bus.default
387 bus.use_default_range = True
388
389 self.l2x0_fake.pio = bus.port
390 self.dmac_fake.pio = bus.port
391 self.uart1_fake.pio = bus.port
392 self.uart2_fake.pio = bus.port
393 self.uart3_fake.pio = bus.port
394 self.smc_fake.pio = bus.port
395 self.sp810_fake.pio = bus.port
396 self.watchdog_fake.pio = bus.port
397 self.aaci_fake.pio = bus.port
398 self.elba_aaci_fake.pio = bus.port
399 self.mmc_fake.pio = bus.port
400 self.rtc_fake.pio = bus.port
401 self.spsc_fake.pio = bus.port
402 self.lan_fake.pio = bus.port
403 self.usb_fake.pio = bus.port
404