| RealView.py (8714:cd48e2802644) | RealView.py (8742:9df38d259935) |
|---|---|
| 1# Copyright (c) 2009-2011 ARM Limited | 1# Copyright (c) 2009 ARM Limited |
| 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated --- 68 unchanged lines hidden (view full) --- 78class RealViewCtrl(BasicPioDevice): 79 type = 'RealViewCtrl' 80 proc_id0 = Param.UInt32(0x0C000000, "Processor ID, SYS_PROCID") 81 proc_id1 = Param.UInt32(0x0C000222, "Processor ID, SYS_PROCID1") 82 idreg = Param.UInt32(0x00000000, "ID Register, SYS_ID") 83 84class Gic(PioDevice): 85 type = 'Gic' | 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated --- 68 unchanged lines hidden (view full) --- 78class RealViewCtrl(BasicPioDevice): 79 type = 'RealViewCtrl' 80 proc_id0 = Param.UInt32(0x0C000000, "Processor ID, SYS_PROCID") 81 proc_id1 = Param.UInt32(0x0C000222, "Processor ID, SYS_PROCID1") 82 idreg = Param.UInt32(0x00000000, "ID Register, SYS_ID") 83 84class Gic(PioDevice): 85 type = 'Gic' |
| 86 platform = Param.Platform(Parent.any, "Platform this device is part of.") |
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| 86 dist_addr = Param.Addr(0x1f001000, "Address for distributor") 87 cpu_addr = Param.Addr(0x1f000100, "Address for cpu") 88 dist_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to distributor") 89 cpu_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to cpu interface") 90 int_latency = Param.Latency('10ns', "Delay for interrupt to get to CPU") 91 it_lines = Param.UInt32(128, "Number of interrupt lines supported (max = 1020)") 92 93class AmbaFake(AmbaDevice): --- 78 unchanged lines hidden (view full) --- 172 gpio2_fake = AmbaFake(pio_addr=0x10015000) 173 ssp_fake = AmbaFake(pio_addr=0x1000d000) 174 sci_fake = AmbaFake(pio_addr=0x1000e000) 175 aaci_fake = AmbaFake(pio_addr=0x10004000) 176 mmc_fake = AmbaFake(pio_addr=0x10005000) 177 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031) 178 179 | 87 dist_addr = Param.Addr(0x1f001000, "Address for distributor") 88 cpu_addr = Param.Addr(0x1f000100, "Address for cpu") 89 dist_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to distributor") 90 cpu_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to cpu interface") 91 int_latency = Param.Latency('10ns', "Delay for interrupt to get to CPU") 92 it_lines = Param.UInt32(128, "Number of interrupt lines supported (max = 1020)") 93 94class AmbaFake(AmbaDevice): --- 78 unchanged lines hidden (view full) --- 173 gpio2_fake = AmbaFake(pio_addr=0x10015000) 174 ssp_fake = AmbaFake(pio_addr=0x1000d000) 175 sci_fake = AmbaFake(pio_addr=0x1000e000) 176 aaci_fake = AmbaFake(pio_addr=0x10004000) 177 mmc_fake = AmbaFake(pio_addr=0x10005000) 178 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031) 179 180 |
| 180 # Attach I/O devices that are on chip and also set the appropriate 181 # ranges for the bridge 182 def attachOnChipIO(self, bus, bridge): | 181 # Attach I/O devices that are on chip 182 def attachOnChipIO(self, bus): |
| 183 self.gic.pio = bus.port 184 self.l2x0_fake.pio = bus.port 185 self.a9scu.pio = bus.port 186 self.local_cpu_timer.pio = bus.port | 183 self.gic.pio = bus.port 184 self.l2x0_fake.pio = bus.port 185 self.a9scu.pio = bus.port 186 self.local_cpu_timer.pio = bus.port |
| 187 # Bridge ranges based on excluding what is part of on-chip I/O 188 # (gic, l2x0, a9scu, local_cpu_timer) 189 bridge.ranges = [AddrRange(self.realview_io.pio_addr, 190 self.a9scu.pio_addr - 1), 191 AddrRange(self.flash_fake.pio_addr, Addr.max)] | |
| 192 193 # Attach I/O devices to specified bus object. Can't do this 194 # earlier, since the bus object itself is typically defined at the 195 # System level. 196 def attachIO(self, bus): 197 self.uart.pio = bus.port 198 self.realview_io.pio = bus.port 199 self.timer0.pio = bus.port 200 self.timer1.pio = bus.port 201 self.clcd.pio = bus.port | 187 188 # Attach I/O devices to specified bus object. Can't do this 189 # earlier, since the bus object itself is typically defined at the 190 # System level. 191 def attachIO(self, bus): 192 self.uart.pio = bus.port 193 self.realview_io.pio = bus.port 194 self.timer0.pio = bus.port 195 self.timer1.pio = bus.port 196 self.clcd.pio = bus.port |
| 202 self.clcd.dma = bus.port | |
| 203 self.kmi0.pio = bus.port 204 self.kmi1.pio = bus.port 205 self.cf_ctrl.pio = bus.port | 197 self.kmi0.pio = bus.port 198 self.kmi1.pio = bus.port 199 self.cf_ctrl.pio = bus.port |
| 206 self.cf_ctrl.config = bus.port 207 self.cf_ctrl.dma = bus.port | |
| 208 self.dmac_fake.pio = bus.port 209 self.uart1_fake.pio = bus.port 210 self.uart2_fake.pio = bus.port 211 self.uart3_fake.pio = bus.port 212 self.smc_fake.pio = bus.port 213 self.sp810_fake.pio = bus.port 214 self.watchdog_fake.pio = bus.port 215 self.gpio0_fake.pio = bus.port --- 36 unchanged lines hidden (view full) --- 252 ssp_fake = AmbaFake(pio_addr=0x1000d000) 253 sci_fake = AmbaFake(pio_addr=0x1000e000) 254 aaci_fake = AmbaFake(pio_addr=0x10004000) 255 mmc_fake = AmbaFake(pio_addr=0x10005000) 256 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031) 257 258 259 | 200 self.dmac_fake.pio = bus.port 201 self.uart1_fake.pio = bus.port 202 self.uart2_fake.pio = bus.port 203 self.uart3_fake.pio = bus.port 204 self.smc_fake.pio = bus.port 205 self.sp810_fake.pio = bus.port 206 self.watchdog_fake.pio = bus.port 207 self.gpio0_fake.pio = bus.port --- 36 unchanged lines hidden (view full) --- 244 ssp_fake = AmbaFake(pio_addr=0x1000d000) 245 sci_fake = AmbaFake(pio_addr=0x1000e000) 246 aaci_fake = AmbaFake(pio_addr=0x10004000) 247 mmc_fake = AmbaFake(pio_addr=0x10005000) 248 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031) 249 250 251 |
| 260 # Attach I/O devices that are on chip and also set the appropriate 261 # ranges for the bridge 262 def attachOnChipIO(self, bus, bridge): | 252 # Attach I/O devices that are on chip 253 def attachOnChipIO(self, bus): |
| 263 self.gic.pio = bus.port 264 self.l2x0_fake.pio = bus.port | 254 self.gic.pio = bus.port 255 self.l2x0_fake.pio = bus.port |
| 265 # Bridge ranges based on excluding what is part of on-chip I/O 266 # (gic, l2x0) 267 bridge.ranges = [AddrRange(self.realview_io.pio_addr, 268 self.gic.cpu_addr - 1), 269 AddrRange(self.flash_fake.pio_addr, Addr.max)] | |
| 270 271 # Attach I/O devices to specified bus object. Can't do this 272 # earlier, since the bus object itself is typically defined at the 273 # System level. 274 def attachIO(self, bus): 275 self.uart.pio = bus.port 276 self.realview_io.pio = bus.port 277 self.timer0.pio = bus.port 278 self.timer1.pio = bus.port 279 self.clcd.pio = bus.port | 256 257 # Attach I/O devices to specified bus object. Can't do this 258 # earlier, since the bus object itself is typically defined at the 259 # System level. 260 def attachIO(self, bus): 261 self.uart.pio = bus.port 262 self.realview_io.pio = bus.port 263 self.timer0.pio = bus.port 264 self.timer1.pio = bus.port 265 self.clcd.pio = bus.port |
| 280 self.clcd.dma = bus.port | |
| 281 self.kmi0.pio = bus.port 282 self.kmi1.pio = bus.port 283 self.dmac_fake.pio = bus.port 284 self.uart1_fake.pio = bus.port 285 self.uart2_fake.pio = bus.port 286 self.uart3_fake.pio = bus.port 287 self.smc_fake.pio = bus.port 288 self.sp810_fake.pio = bus.port --- 51 unchanged lines hidden (view full) --- 340 elba_aaci_fake = AmbaFake(pio_addr=0xE0004000) 341 mmc_fake = AmbaFake(pio_addr=0xE0005000) # not sure if we need this 342 rtc_fake = AmbaFake(pio_addr=0xE0017000, amba_id=0x41031) 343 spsc_fake = IsaFake(pio_addr=0xE001B000, pio_size=0x2000) 344 lan_fake = IsaFake(pio_addr=0xFA000000, pio_size=0xffff) 345 usb_fake = IsaFake(pio_addr=0xFB000000, pio_size=0x1ffff) 346 347 | 266 self.kmi0.pio = bus.port 267 self.kmi1.pio = bus.port 268 self.dmac_fake.pio = bus.port 269 self.uart1_fake.pio = bus.port 270 self.uart2_fake.pio = bus.port 271 self.uart3_fake.pio = bus.port 272 self.smc_fake.pio = bus.port 273 self.sp810_fake.pio = bus.port --- 51 unchanged lines hidden (view full) --- 325 elba_aaci_fake = AmbaFake(pio_addr=0xE0004000) 326 mmc_fake = AmbaFake(pio_addr=0xE0005000) # not sure if we need this 327 rtc_fake = AmbaFake(pio_addr=0xE0017000, amba_id=0x41031) 328 spsc_fake = IsaFake(pio_addr=0xE001B000, pio_size=0x2000) 329 lan_fake = IsaFake(pio_addr=0xFA000000, pio_size=0xffff) 330 usb_fake = IsaFake(pio_addr=0xFB000000, pio_size=0x1ffff) 331 332 |
| 348 # Attach I/O devices that are on chip and also set the appropriate 349 # ranges for the bridge 350 def attachOnChipIO(self, bus, bridge): | 333 # Attach I/O devices that are on chip 334 def attachOnChipIO(self, bus): |
| 351 self.gic.pio = bus.port 352 self.a9scu.pio = bus.port | 335 self.gic.pio = bus.port 336 self.a9scu.pio = bus.port |
| 353 # Bridge ranges based on excluding what is part of on-chip I/O 354 # (gic, a9scu) 355 bridge.ranges = [AddrRange(self.pci_cfg_base, self.a9scu.pio_addr - 1), 356 AddrRange(self.local_cpu_timer.pio_addr, Addr.max)] | |
| 357 358 # Attach I/O devices to specified bus object. Can't do this 359 # earlier, since the bus object itself is typically defined at the 360 # System level. 361 def attachIO(self, bus): 362 self.elba_uart.pio = bus.port 363 self.uart.pio = bus.port 364 self.realview_io.pio = bus.port 365 self.local_cpu_timer.pio = bus.port 366 self.v2m_timer0.pio = bus.port 367 self.v2m_timer1.pio = bus.port 368 self.elba_timer0.pio = bus.port 369 self.elba_timer1.pio = bus.port 370 self.clcd.pio = bus.port | 337 338 # Attach I/O devices to specified bus object. Can't do this 339 # earlier, since the bus object itself is typically defined at the 340 # System level. 341 def attachIO(self, bus): 342 self.elba_uart.pio = bus.port 343 self.uart.pio = bus.port 344 self.realview_io.pio = bus.port 345 self.local_cpu_timer.pio = bus.port 346 self.v2m_timer0.pio = bus.port 347 self.v2m_timer1.pio = bus.port 348 self.elba_timer0.pio = bus.port 349 self.elba_timer1.pio = bus.port 350 self.clcd.pio = bus.port |
| 371 self.clcd.dma = bus.port | |
| 372 self.kmi0.pio = bus.port 373 self.kmi1.pio = bus.port 374 self.elba_kmi0.pio = bus.port 375 self.elba_kmi1.pio = bus.port 376 self.cf_ctrl.pio = bus.port | 351 self.kmi0.pio = bus.port 352 self.kmi1.pio = bus.port 353 self.elba_kmi0.pio = bus.port 354 self.elba_kmi1.pio = bus.port 355 self.cf_ctrl.pio = bus.port |
| 377 self.cf_ctrl.config = bus.port 378 self.cf_ctrl.dma = bus.port | |
| 379 self.ide.pio = bus.port | 356 self.ide.pio = bus.port |
| 380 self.ide.config = bus.port 381 self.ide.dma = bus.port | |
| 382 self.ethernet.pio = bus.port | 357 self.ethernet.pio = bus.port |
| 383 self.ethernet.config = bus.port 384 self.ethernet.dma = bus.port | |
| 385 self.pciconfig.pio = bus.default 386 bus.use_default_range = True 387 388 self.l2x0_fake.pio = bus.port 389 self.dmac_fake.pio = bus.port 390 self.uart1_fake.pio = bus.port 391 self.uart2_fake.pio = bus.port 392 self.uart3_fake.pio = bus.port 393 self.smc_fake.pio = bus.port 394 self.sp810_fake.pio = bus.port 395 self.watchdog_fake.pio = bus.port 396 self.aaci_fake.pio = bus.port 397 self.elba_aaci_fake.pio = bus.port 398 self.mmc_fake.pio = bus.port 399 self.rtc_fake.pio = bus.port 400 self.spsc_fake.pio = bus.port 401 self.lan_fake.pio = bus.port 402 self.usb_fake.pio = bus.port 403 | 358 self.pciconfig.pio = bus.default 359 bus.use_default_range = True 360 361 self.l2x0_fake.pio = bus.port 362 self.dmac_fake.pio = bus.port 363 self.uart1_fake.pio = bus.port 364 self.uart2_fake.pio = bus.port 365 self.uart3_fake.pio = bus.port 366 self.smc_fake.pio = bus.port 367 self.sp810_fake.pio = bus.port 368 self.watchdog_fake.pio = bus.port 369 self.aaci_fake.pio = bus.port 370 self.elba_aaci_fake.pio = bus.port 371 self.mmc_fake.pio = bus.port 372 self.rtc_fake.pio = bus.port 373 self.spsc_fake.pio = bus.port 374 self.lan_fake.pio = bus.port 375 self.usb_fake.pio = bus.port 376 |