RealView.py (13013:b204ddd2b986) RealView.py (13014:a4f71c3dc602)
1# Copyright (c) 2009-2018 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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69# emulation. Use a GIC model that automatically switches between
70# gem5's GIC model and KVM's GIC model if KVM is available.
71try:
72 from KvmGic import MuxingKvmGic
73 kvm_gicv2_class = MuxingKvmGic
74except ImportError:
75 # KVM support wasn't compiled into gem5. Fallback to a
76 # software-only GIC.
1# Copyright (c) 2009-2018 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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69# emulation. Use a GIC model that automatically switches between
70# gem5's GIC model and KVM's GIC model if KVM is available.
71try:
72 from KvmGic import MuxingKvmGic
73 kvm_gicv2_class = MuxingKvmGic
74except ImportError:
75 # KVM support wasn't compiled into gem5. Fallback to a
76 # software-only GIC.
77 kvm_gicv2_class = Pl390
77 kvm_gicv2_class = GicV2
78 pass
79
80class AmbaPioDevice(BasicPioDevice):
81 type = 'AmbaPioDevice'
82 abstract = True
83 cxx_header = "dev/arm/amba_device.hh"
84 amba_id = Param.UInt32("ID of AMBA device for kernel detection")
85

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609# Reference for memory map and interrupt number
610# RealView Platform Baseboard Explore for Cortex-A9 User Guide(ARM DUI 0440A)
611# Chapter 4: Programmer's Reference
612class RealViewPBX(RealView):
613 uart = Pl011(pio_addr=0x10009000, int_num=44)
614 realview_io = RealViewCtrl(pio_addr=0x10000000)
615 mcc = VExpressMCC()
616 dcc = CoreTile2A15DCC()
78 pass
79
80class AmbaPioDevice(BasicPioDevice):
81 type = 'AmbaPioDevice'
82 abstract = True
83 cxx_header = "dev/arm/amba_device.hh"
84 amba_id = Param.UInt32("ID of AMBA device for kernel detection")
85

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609# Reference for memory map and interrupt number
610# RealView Platform Baseboard Explore for Cortex-A9 User Guide(ARM DUI 0440A)
611# Chapter 4: Programmer's Reference
612class RealViewPBX(RealView):
613 uart = Pl011(pio_addr=0x10009000, int_num=44)
614 realview_io = RealViewCtrl(pio_addr=0x10000000)
615 mcc = VExpressMCC()
616 dcc = CoreTile2A15DCC()
617 gic = Pl390(cpu_addr=0x1f000100, dist_addr=0x1f001000, cpu_size=0x100)
617 gic = GicV2(cpu_addr=0x1f000100, dist_addr=0x1f001000, cpu_size=0x100)
618 pci_host = GenericPciHost(
619 conf_base=0x30000000, conf_size='256MB', conf_device_bits=16,
620 pci_pio_base=0)
621 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000)
622 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000)
623 global_timer = A9GlobalTimer(int_num=27, pio_addr=0x1f000200)
624 local_cpu_timer = CpuLocalTimer(int_num_timer=29, int_num_watchdog=30,
625 pio_addr=0x1f000600)

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869 # Platform control device (off-chip)
870 realview_io = RealViewCtrl(proc_id0=0x14000000, proc_id1=0x14000000,
871 idreg=0x02250000, pio_addr=0x1C010000)
872
873 mcc = VExpressMCC()
874 dcc = CoreTile2A15DCC()
875
876 ### On-chip devices ###
618 pci_host = GenericPciHost(
619 conf_base=0x30000000, conf_size='256MB', conf_device_bits=16,
620 pci_pio_base=0)
621 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000)
622 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000)
623 global_timer = A9GlobalTimer(int_num=27, pio_addr=0x1f000200)
624 local_cpu_timer = CpuLocalTimer(int_num_timer=29, int_num_watchdog=30,
625 pio_addr=0x1f000600)

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869 # Platform control device (off-chip)
870 realview_io = RealViewCtrl(proc_id0=0x14000000, proc_id1=0x14000000,
871 idreg=0x02250000, pio_addr=0x1C010000)
872
873 mcc = VExpressMCC()
874 dcc = CoreTile2A15DCC()
875
876 ### On-chip devices ###
877 gic = Pl390(dist_addr=0x2C001000, cpu_addr=0x2C002000)
877 gic = GicV2(dist_addr=0x2C001000, cpu_addr=0x2C002000)
878 vgic = VGic(vcpu_addr=0x2c006000, hv_addr=0x2c004000, ppint=25)
879
880 local_cpu_timer = CpuLocalTimer(int_num_timer=29, int_num_watchdog=30,
881 pio_addr=0x2C080000)
882
883 hdlcd = HDLcd(pxl_clk=dcc.osc_pxl,
884 pio_addr=0x2b000000, int_num=117,
885 workaround_swap_rb=True)

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967 # Attach any PCI devices that are supported
968 def attachPciDevices(self):
969 self.ethernet = IGbE_e1000(pci_bus=0, pci_dev=0, pci_func=0,
970 InterruptLine=1, InterruptPin=1)
971 self.ide = IdeController(disks = [], pci_bus=0, pci_dev=1, pci_func=0,
972 InterruptLine=2, InterruptPin=2)
973
974 def enableMSIX(self):
878 vgic = VGic(vcpu_addr=0x2c006000, hv_addr=0x2c004000, ppint=25)
879
880 local_cpu_timer = CpuLocalTimer(int_num_timer=29, int_num_watchdog=30,
881 pio_addr=0x2C080000)
882
883 hdlcd = HDLcd(pxl_clk=dcc.osc_pxl,
884 pio_addr=0x2b000000, int_num=117,
885 workaround_swap_rb=True)

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967 # Attach any PCI devices that are supported
968 def attachPciDevices(self):
969 self.ethernet = IGbE_e1000(pci_bus=0, pci_dev=0, pci_func=0,
970 InterruptLine=1, InterruptPin=1)
971 self.ide = IdeController(disks = [], pci_bus=0, pci_dev=1, pci_func=0,
972 InterruptLine=2, InterruptPin=2)
973
974 def enableMSIX(self):
975 self.gic = Pl390(dist_addr=0x2C001000, cpu_addr=0x2C002000, it_lines=512)
975 self.gic = GicV2(dist_addr=0x2C001000, cpu_addr=0x2C002000, it_lines=512)
976 self.gicv2m = Gicv2m()
977 self.gicv2m.frames = [Gicv2mFrame(spi_base=256, spi_len=64, addr=0x2C1C0000)]
978
979 def setupBootLoader(self, mem_bus, cur_sys, loc):
980 cur_sys.bootmem = SimpleMemory(range = AddrRange('64MB'),
981 conf_table_reported = False)
982 if mem_bus is not None:
983 cur_sys.bootmem.port = mem_bus.master

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976 self.gicv2m = Gicv2m()
977 self.gicv2m.frames = [Gicv2mFrame(spi_base=256, spi_len=64, addr=0x2C1C0000)]
978
979 def setupBootLoader(self, mem_bus, cur_sys, loc):
980 cur_sys.bootmem = SimpleMemory(range = AddrRange('64MB'),
981 conf_table_reported = False)
982 if mem_bus is not None:
983 cur_sys.bootmem.port = mem_bus.master

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