| RealView.py (12741:6d088ffe06b1) | RealView.py (12760:145d5c512cfc) |
|---|---|
| 1# Copyright (c) 2009-2018 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 991 unchanged lines hidden (view full) --- 1000 conf_table_reported=False) 1001 if mem_bus is not None: 1002 cur_sys.bootmem.port = mem_bus.master 1003 if not cur_sys.boot_loader: 1004 cur_sys.boot_loader = loc('boot_emm.arm64') 1005 cur_sys.atags_addr = 0x8000000 1006 cur_sys.load_offset = 0x80000000 1007 | 1# Copyright (c) 2009-2018 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 991 unchanged lines hidden (view full) --- 1000 conf_table_reported=False) 1001 if mem_bus is not None: 1002 cur_sys.bootmem.port = mem_bus.master 1003 if not cur_sys.boot_loader: 1004 cur_sys.boot_loader = loc('boot_emm.arm64') 1005 cur_sys.atags_addr = 0x8000000 1006 cur_sys.load_offset = 0x80000000 1007 |
| 1008class VExpress_GEM5_V1(RealView): | 1008class VExpress_GEM5_V1_Base(RealView): |
| 1009 """ 1010The VExpress gem5 memory map is loosely based on a modified 1011Versatile Express RS1 memory map. 1012 1013The gem5 platform has been designed to implement a subset of the 1014original Versatile Express RS1 memory map. Off-chip peripherals should, 1015when possible, adhere to the Versatile Express memory map. Non-PCI 1016off-chip devices that are gem5-specific should live in the CS5 memory --- 108 unchanged lines hidden (view full) --- 1125 gicv2m = Gicv2m() 1126 gicv2m.frames = [ 1127 Gicv2mFrame(spi_base=256, spi_len=64, addr=0x2c1c0000), 1128 ] 1129 1130 generic_timer = GenericTimer(int_phys_s=29, int_phys_ns=30, 1131 int_virt=27, int_hyp=26) 1132 | 1009 """ 1010The VExpress gem5 memory map is loosely based on a modified 1011Versatile Express RS1 memory map. 1012 1013The gem5 platform has been designed to implement a subset of the 1014original Versatile Express RS1 memory map. Off-chip peripherals should, 1015when possible, adhere to the Versatile Express memory map. Non-PCI 1016off-chip devices that are gem5-specific should live in the CS5 memory --- 108 unchanged lines hidden (view full) --- 1125 gicv2m = Gicv2m() 1126 gicv2m.frames = [ 1127 Gicv2mFrame(spi_base=256, spi_len=64, addr=0x2c1c0000), 1128 ] 1129 1130 generic_timer = GenericTimer(int_phys_s=29, int_phys_ns=30, 1131 int_virt=27, int_hyp=26) 1132 |
| 1133 hdlcd = HDLcd(pxl_clk=dcc.osc_pxl, 1134 pio_addr=0x2b000000, int_num=95) 1135 | |
| 1136 def _on_chip_devices(self): 1137 return [ 1138 self.gic, self.vgic, self.gicv2m, | 1133 def _on_chip_devices(self): 1134 return [ 1135 self.gic, self.vgic, self.gicv2m, |
| 1139 self.hdlcd, | |
| 1140 self.generic_timer, 1141 ] 1142 1143 ### Off-chip devices ### 1144 clock24MHz = SrcClockDomain(clock="24MHz", 1145 voltage_domain=VoltageDomain(voltage="3.3V")) 1146 1147 uart0 = Pl011(pio_addr=0x1c090000, int_num=37) --- 48 unchanged lines hidden (view full) --- 1196 1197 # Setup m5ops. It's technically not a part of the boot 1198 # loader, but this is the only place we can configure the 1199 # system. 1200 cur_sys.m5ops_base = 0x10010000 1201 1202 def generateDeviceTree(self, state): 1203 # Generate using standard RealView function | 1136 self.generic_timer, 1137 ] 1138 1139 ### Off-chip devices ### 1140 clock24MHz = SrcClockDomain(clock="24MHz", 1141 voltage_domain=VoltageDomain(voltage="3.3V")) 1142 1143 uart0 = Pl011(pio_addr=0x1c090000, int_num=37) --- 48 unchanged lines hidden (view full) --- 1192 1193 # Setup m5ops. It's technically not a part of the boot 1194 # loader, but this is the only place we can configure the 1195 # system. 1196 cur_sys.m5ops_base = 0x10010000 1197 1198 def generateDeviceTree(self, state): 1199 # Generate using standard RealView function |
| 1204 dt = list(super(VExpress_GEM5_V1, self).generateDeviceTree(state)) | 1200 dt = list(super(VExpress_GEM5_V1_Base, self).generateDeviceTree(state)) |
| 1205 if len(dt) > 1: 1206 raise Exception("System returned too many DT nodes") 1207 node = dt[0] 1208 1209 node.appendCompatible(["arm,vexpress"]) 1210 node.append(FdtPropertyStrings("model", ["V2P-CA15"])) 1211 node.append(FdtPropertyWords("arm,hbi", [0x0])) 1212 node.append(FdtPropertyWords("arm,vexpress,site", [0xf])) 1213 1214 yield node | 1201 if len(dt) > 1: 1202 raise Exception("System returned too many DT nodes") 1203 node = dt[0] 1204 1205 node.appendCompatible(["arm,vexpress"]) 1206 node.append(FdtPropertyStrings("model", ["V2P-CA15"])) 1207 node.append(FdtPropertyWords("arm,hbi", [0x0])) 1208 node.append(FdtPropertyWords("arm,vexpress,site", [0xf])) 1209 1210 yield node |
| 1211 1212 1213class VExpress_GEM5_V1(VExpress_GEM5_V1_Base): 1214 hdlcd = HDLcd(pxl_clk=VExpress_GEM5_V1_Base.dcc.osc_pxl, 1215 pio_addr=0x2b000000, int_num=95) 1216 1217 def _on_chip_devices(self): 1218 return super(VExpress_GEM5_V1,self)._on_chip_devices() + [ 1219 self.hdlcd, 1220 ] |
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