| RealView.py (11595:5c6e658fd90c) | RealView.py (11597:da2c13f1b2e1) |
|---|---|
| 1# Copyright (c) 2009-2015 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 287 unchanged lines hidden (view full) --- 296 def _on_chip_devices(self): 297 return [] 298 299 def _off_chip_devices(self): 300 return [] 301 302 _off_chip_ranges = [] 303 | 1# Copyright (c) 2009-2015 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 287 unchanged lines hidden (view full) --- 296 def _on_chip_devices(self): 297 return [] 298 299 def _off_chip_devices(self): 300 return [] 301 302 _off_chip_ranges = [] 303 |
| 304 def _attach_io(self, devices, bus): | 304 def _attach_device(self, device, bus, dma_ports=None): 305 if hasattr(device, "pio"): 306 device.pio = bus.master 307 if hasattr(device, "dma"): 308 if dma_ports is None: 309 device.dma = bus.slave 310 else: 311 dma_ports.append(device.dma) 312 313 def _attach_io(self, devices, *args, **kwargs): |
| 305 for d in devices: | 314 for d in devices: |
| 306 if hasattr(d, "pio"): 307 d.pio = bus.master 308 if hasattr(d, "dma"): 309 d.dma = bus.slave | 315 self._attach_device(d, *args, **kwargs) |
| 310 311 def _attach_clk(self, devices, clkdomain): 312 for d in devices: 313 if hasattr(d, "clk_domain"): 314 d.clk_domain = clkdomain 315 316 def attachPciDevices(self): 317 pass 318 319 def enableMSIX(self): 320 pass 321 322 def onChipIOClkDomain(self, clkdomain): 323 self._attach_clk(self._on_chip_devices(), clkdomain) 324 325 def offChipIOClkDomain(self, clkdomain): 326 self._attach_clk(self._off_chip_devices(), clkdomain) 327 | 316 317 def _attach_clk(self, devices, clkdomain): 318 for d in devices: 319 if hasattr(d, "clk_domain"): 320 d.clk_domain = clkdomain 321 322 def attachPciDevices(self): 323 pass 324 325 def enableMSIX(self): 326 pass 327 328 def onChipIOClkDomain(self, clkdomain): 329 self._attach_clk(self._on_chip_devices(), clkdomain) 330 331 def offChipIOClkDomain(self, clkdomain): 332 self._attach_clk(self._off_chip_devices(), clkdomain) 333 |
| 328 def attachOnChipIO(self, bus, bridge=None): 329 self._attach_io(self._on_chip_devices(), bus) | 334 def attachOnChipIO(self, bus, bridge=None, **kwargs): 335 self._attach_io(self._on_chip_devices(), bus, **kwargs) |
| 330 if bridge: 331 bridge.ranges = self._off_chip_ranges 332 | 336 if bridge: 337 bridge.ranges = self._off_chip_ranges 338 |
| 333 def attachIO(self, bus): 334 self._attach_io(self._off_chip_devices(), bus) | 339 def attachIO(self, *args, **kwargs): 340 self._attach_io(self._off_chip_devices(), *args, **kwargs) |
| 335 336 337 def setupBootLoader(self, mem_bus, cur_sys, loc): 338 self.nvmem = SimpleMemory(range = AddrRange('2GB', size = '64MB'), 339 conf_table_reported = False) 340 self.nvmem.port = mem_bus.master 341 cur_sys.boot_loader = loc('boot.arm') 342 cur_sys.atags_addr = 0x100 --- 575 unchanged lines hidden (view full) --- 918 self.realview_io, 919 self.uart0, 920 self.kmi0, self.kmi1, 921 self.rtc, 922 self.pci_host, 923 self.energy_ctrl, 924 ] 925 | 341 342 343 def setupBootLoader(self, mem_bus, cur_sys, loc): 344 self.nvmem = SimpleMemory(range = AddrRange('2GB', size = '64MB'), 345 conf_table_reported = False) 346 self.nvmem.port = mem_bus.master 347 cur_sys.boot_loader = loc('boot.arm') 348 cur_sys.atags_addr = 0x100 --- 575 unchanged lines hidden (view full) --- 924 self.realview_io, 925 self.uart0, 926 self.kmi0, self.kmi1, 927 self.rtc, 928 self.pci_host, 929 self.energy_ctrl, 930 ] 931 |
| 926 def attachPciDevice(self, device, bus): | 932 def attachPciDevice(self, device, *args, **kwargs): |
| 927 device.host = self.pci_host | 933 device.host = self.pci_host |
| 928 device.pio = bus.master 929 device.dma = bus.slave | 934 self._attach_device(device, *args, **kwargs) |
| 930 931 def setupBootLoader(self, mem_bus, cur_sys, loc): 932 self.nvmem = SimpleMemory(range=AddrRange(0, size='64MB'), 933 conf_table_reported=False) 934 self.nvmem.port = mem_bus.master 935 cur_sys.boot_loader = [ loc('boot_emm.arm64'), loc('boot_emm.arm') ] 936 cur_sys.atags_addr = 0x8000000 937 cur_sys.load_addr_mask = 0xfffffff 938 cur_sys.load_offset = 0x80000000 | 935 936 def setupBootLoader(self, mem_bus, cur_sys, loc): 937 self.nvmem = SimpleMemory(range=AddrRange(0, size='64MB'), 938 conf_table_reported=False) 939 self.nvmem.port = mem_bus.master 940 cur_sys.boot_loader = [ loc('boot_emm.arm64'), loc('boot_emm.arm') ] 941 cur_sys.atags_addr = 0x8000000 942 cur_sys.load_addr_mask = 0xfffffff 943 cur_sys.load_offset = 0x80000000 |