RealView.py (11090:f37a6b82f98f) | RealView.py (11236:3232a75ed9c0) |
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1# Copyright (c) 2009-2015 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 41 unchanged lines hidden (view full) --- 50from Ide import * 51from Platform import Platform 52from Terminal import Terminal 53from Uart import Uart 54from SimpleMemory import SimpleMemory 55from Gic import * 56from EnergyCtrl import EnergyCtrl 57from ClockDomain import SrcClockDomain | 1# Copyright (c) 2009-2015 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 41 unchanged lines hidden (view full) --- 50from Ide import * 51from Platform import Platform 52from Terminal import Terminal 53from Uart import Uart 54from SimpleMemory import SimpleMemory 55from Gic import * 56from EnergyCtrl import EnergyCtrl 57from ClockDomain import SrcClockDomain |
58from SubSystem import SubSystem |
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58 59class AmbaPioDevice(BasicPioDevice): 60 type = 'AmbaPioDevice' 61 abstract = True 62 cxx_header = "dev/arm/amba_device.hh" 63 amba_id = Param.UInt32("ID of AMBA device for kernel detection") 64 65class AmbaIntDevice(AmbaPioDevice): --- 43 unchanged lines hidden (view full) --- 109 # about the site/position/dcc/device allocation. 110 site = Param.UInt8("Board Site") 111 position = Param.UInt8("Position in device stack") 112 dcc = Param.UInt8("Daughterboard Configuration Controller") 113 device = Param.UInt8("Device ID") 114 115 freq = Param.Clock("Default frequency") 116 | 59 60class AmbaPioDevice(BasicPioDevice): 61 type = 'AmbaPioDevice' 62 abstract = True 63 cxx_header = "dev/arm/amba_device.hh" 64 amba_id = Param.UInt32("ID of AMBA device for kernel detection") 65 66class AmbaIntDevice(AmbaPioDevice): --- 43 unchanged lines hidden (view full) --- 110 # about the site/position/dcc/device allocation. 111 site = Param.UInt8("Board Site") 112 position = Param.UInt8("Position in device stack") 113 dcc = Param.UInt8("Daughterboard Configuration Controller") 114 device = Param.UInt8("Device ID") 115 116 freq = Param.Clock("Default frequency") 117 |
117class VExpressCoreTileCtrl(RealViewCtrl): 118 class MotherBoardOsc(RealViewOsc): | 118class VExpressMCC(SubSystem): 119 """ARM V2M-P1 Motherboard Configuration Controller 120 121This subsystem describes a subset of the devices that sit behind the 122motherboard configuration controller on the the ARM Motherboard 123Express (V2M-P1) motherboard. See ARM DUI 0447J for details. 124 """ 125 126 class Osc(RealViewOsc): |
119 site, position, dcc = (0, 0, 0) 120 | 127 site, position, dcc = (0, 0, 0) 128 |
121 class CoreTileOsc(RealViewOsc): 122 site, position, dcc = (1, 0, 0) | 129 osc_mcc = Osc(device=0, freq="50MHz") 130 osc_clcd = Osc(device=1, freq="23.75MHz") 131 osc_peripheral = Osc(device=2, freq="24MHz") 132 osc_system_bus = Osc(device=4, freq="24MHz") |
123 | 133 |
124 # See ARM DUI 0447J (ARM Motherboard Express uATX -- V2M-P1) 125 osc_mcc = MotherBoardOsc(device=0, freq="50MHz") 126 osc_clcd = MotherBoardOsc(device=1, freq="23.75MHz") 127 osc_peripheral = MotherBoardOsc(device=2, freq="24MHz") 128 osc_system_bus = MotherBoardOsc(device=4, freq="24MHz") | 134class CoreTile2A15DCC(SubSystem): 135 """ARM CoreTile Express A15x2 Daughterboard Configuration Controller |
129 | 136 |
130 # See Table 2.8 in ARM DUI 0604E (CoreTile Express A15x2 TRM). 131 osc_cpu = CoreTileOsc(device=0, freq="60MHz") 132 osc_hsbm = CoreTileOsc(device=4, freq="40MHz") 133 osc_pxl = CoreTileOsc(device=5, freq="23.75MHz") 134 osc_smb = CoreTileOsc(device=6, freq="50MHz") 135 osc_sys = CoreTileOsc(device=7, freq="60MHz") 136 osc_ddr = CoreTileOsc(device=8, freq="40MHz") | 137This subsystem describes a subset of the devices that sit behind the 138daughterboard configuration controller on a CoreTile Express A15x2. See 139ARM DUI 0604E for details. 140 """ |
137 | 141 |
142 class Osc(RealViewOsc): 143 site, position, dcc = (1, 0, 0) 144 145 # See Table 2.8 in ARM DUI 0604E (CoreTile Express A15x2 TRM) 146 osc_cpu = Osc(device=0, freq="60MHz") 147 osc_hsbm = Osc(device=4, freq="40MHz") 148 osc_pxl = Osc(device=5, freq="23.75MHz") 149 osc_smb = Osc(device=6, freq="50MHz") 150 osc_sys = Osc(device=7, freq="60MHz") 151 osc_ddr = Osc(device=8, freq="40MHz") 152 |
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138class VGic(PioDevice): 139 type = 'VGic' 140 cxx_header = "dev/arm/vgic.hh" 141 gic = Param.BaseGic(Parent.any, "Gic to use for interrupting") 142 platform = Param.Platform(Parent.any, "Platform this device is part of.") 143 vcpu_addr = Param.Addr(0, "Address for vcpu interfaces") 144 hv_addr = Param.Addr(0, "Address for hv control") 145 pio_delay = Param.Latency('10ns', "Delay for PIO r/w") --- 122 unchanged lines hidden (view full) --- 268 cur_sys.load_offset = 0 269 270 271# Reference for memory map and interrupt number 272# RealView Platform Baseboard Explore for Cortex-A9 User Guide(ARM DUI 0440A) 273# Chapter 4: Programmer's Reference 274class RealViewPBX(RealView): 275 uart = Pl011(pio_addr=0x10009000, int_num=44) | 153class VGic(PioDevice): 154 type = 'VGic' 155 cxx_header = "dev/arm/vgic.hh" 156 gic = Param.BaseGic(Parent.any, "Gic to use for interrupting") 157 platform = Param.Platform(Parent.any, "Platform this device is part of.") 158 vcpu_addr = Param.Addr(0, "Address for vcpu interfaces") 159 hv_addr = Param.Addr(0, "Address for hv control") 160 pio_delay = Param.Latency('10ns', "Delay for PIO r/w") --- 122 unchanged lines hidden (view full) --- 283 cur_sys.load_offset = 0 284 285 286# Reference for memory map and interrupt number 287# RealView Platform Baseboard Explore for Cortex-A9 User Guide(ARM DUI 0440A) 288# Chapter 4: Programmer's Reference 289class RealViewPBX(RealView): 290 uart = Pl011(pio_addr=0x10009000, int_num=44) |
276 realview_io = VExpressCoreTileCtrl(pio_addr=0x10000000) | 291 realview_io = RealViewCtrl(pio_addr=0x10000000) 292 mcc = VExpressMCC() 293 dcc = CoreTile2A15DCC() |
277 gic = Pl390() 278 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000) 279 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000) 280 local_cpu_timer = CpuLocalTimer(int_num_timer=29, int_num_watchdog=30, pio_addr=0x1f000600) 281 clcd = Pl111(pio_addr=0x10020000, int_num=55) 282 kmi0 = Pl050(pio_addr=0x10006000, int_num=52) 283 kmi1 = Pl050(pio_addr=0x10007000, int_num=53, is_mouse=True) 284 a9scu = A9SCU(pio_addr=0x1f000000) --- 110 unchanged lines hidden (view full) --- 395 self.flash_fake.clk_domain = clkdomain 396 self.energy_ctrl.clk_domain = clkdomain 397 398# Reference for memory map and interrupt number 399# RealView Emulation Baseboard User Guide (ARM DUI 0143B) 400# Chapter 4: Programmer's Reference 401class RealViewEB(RealView): 402 uart = Pl011(pio_addr=0x10009000, int_num=44) | 294 gic = Pl390() 295 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000) 296 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000) 297 local_cpu_timer = CpuLocalTimer(int_num_timer=29, int_num_watchdog=30, pio_addr=0x1f000600) 298 clcd = Pl111(pio_addr=0x10020000, int_num=55) 299 kmi0 = Pl050(pio_addr=0x10006000, int_num=52) 300 kmi1 = Pl050(pio_addr=0x10007000, int_num=53, is_mouse=True) 301 a9scu = A9SCU(pio_addr=0x1f000000) --- 110 unchanged lines hidden (view full) --- 412 self.flash_fake.clk_domain = clkdomain 413 self.energy_ctrl.clk_domain = clkdomain 414 415# Reference for memory map and interrupt number 416# RealView Emulation Baseboard User Guide (ARM DUI 0143B) 417# Chapter 4: Programmer's Reference 418class RealViewEB(RealView): 419 uart = Pl011(pio_addr=0x10009000, int_num=44) |
403 realview_io = VExpressCoreTileCtrl(pio_addr=0x10000000, idreg=0x01400500) | 420 realview_io = RealViewCtrl(pio_addr=0x10000000, idreg=0x01400500) 421 mcc = VExpressMCC() 422 dcc = CoreTile2A15DCC() |
404 gic = Pl390(dist_addr=0x10041000, cpu_addr=0x10040000) 405 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000) 406 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000) 407 clcd = Pl111(pio_addr=0x10020000, int_num=23) 408 kmi0 = Pl050(pio_addr=0x10006000, int_num=20) 409 kmi1 = Pl050(pio_addr=0x10007000, int_num=21, is_mouse=True) 410 411 l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff, warn_access="1") --- 93 unchanged lines hidden (view full) --- 505 self.flash_fake.clk_domain = clkdomain 506 self.smcreg_fake.clk_domain = clkdomain 507 self.energy_ctrl.clk_domain = clkdomain 508 509class VExpress_EMM(RealView): 510 _mem_regions = [(Addr('2GB'), Addr('2GB'))] 511 pci_cfg_base = 0x30000000 512 uart = Pl011(pio_addr=0x1c090000, int_num=37) | 423 gic = Pl390(dist_addr=0x10041000, cpu_addr=0x10040000) 424 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000) 425 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000) 426 clcd = Pl111(pio_addr=0x10020000, int_num=23) 427 kmi0 = Pl050(pio_addr=0x10006000, int_num=20) 428 kmi1 = Pl050(pio_addr=0x10007000, int_num=21, is_mouse=True) 429 430 l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff, warn_access="1") --- 93 unchanged lines hidden (view full) --- 524 self.flash_fake.clk_domain = clkdomain 525 self.smcreg_fake.clk_domain = clkdomain 526 self.energy_ctrl.clk_domain = clkdomain 527 528class VExpress_EMM(RealView): 529 _mem_regions = [(Addr('2GB'), Addr('2GB'))] 530 pci_cfg_base = 0x30000000 531 uart = Pl011(pio_addr=0x1c090000, int_num=37) |
513 realview_io = VExpressCoreTileCtrl( | 532 realview_io = RealViewCtrl( |
514 proc_id0=0x14000000, proc_id1=0x14000000, 515 idreg=0x02250000, pio_addr=0x1C010000) | 533 proc_id0=0x14000000, proc_id1=0x14000000, 534 idreg=0x02250000, pio_addr=0x1C010000) |
535 mcc = VExpressMCC() 536 dcc = CoreTile2A15DCC() |
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516 gic = Pl390(dist_addr=0x2C001000, cpu_addr=0x2C002000) 517 local_cpu_timer = CpuLocalTimer(int_num_timer=29, int_num_watchdog=30, pio_addr=0x2C080000) 518 generic_timer = GenericTimer(int_phys=29, int_virt=27) 519 timer0 = Sp804(int_num0=34, int_num1=34, pio_addr=0x1C110000, clock0='1MHz', clock1='1MHz') 520 timer1 = Sp804(int_num0=35, int_num1=35, pio_addr=0x1C120000, clock0='1MHz', clock1='1MHz') 521 clcd = Pl111(pio_addr=0x1c1f0000, int_num=46) | 537 gic = Pl390(dist_addr=0x2C001000, cpu_addr=0x2C002000) 538 local_cpu_timer = CpuLocalTimer(int_num_timer=29, int_num_watchdog=30, pio_addr=0x2C080000) 539 generic_timer = GenericTimer(int_phys=29, int_virt=27) 540 timer0 = Sp804(int_num0=34, int_num1=34, pio_addr=0x1C110000, clock0='1MHz', clock1='1MHz') 541 timer1 = Sp804(int_num0=35, int_num1=35, pio_addr=0x1C120000, clock0='1MHz', clock1='1MHz') 542 clcd = Pl111(pio_addr=0x1c1f0000, int_num=46) |
522 hdlcd = HDLcd(pxl_clk=realview_io.osc_pxl, | 543 hdlcd = HDLcd(pxl_clk=dcc.osc_pxl, |
523 pio_addr=0x2b000000, int_num=117) 524 kmi0 = Pl050(pio_addr=0x1c060000, int_num=44) 525 kmi1 = Pl050(pio_addr=0x1c070000, int_num=45, is_mouse=True) 526 vgic = VGic(vcpu_addr=0x2c006000, hv_addr=0x2c004000, ppint=25) 527 cf_ctrl = IdeController(disks=[], pci_func=0, pci_dev=0, pci_bus=2, 528 io_shift = 2, ctrl_offset = 2, Command = 0x1, 529 BAR0 = 0x1C1A0000, BAR0Size = '256B', 530 BAR1 = 0x1C1A0100, BAR1Size = '4096B', --- 154 unchanged lines hidden --- | 544 pio_addr=0x2b000000, int_num=117) 545 kmi0 = Pl050(pio_addr=0x1c060000, int_num=44) 546 kmi1 = Pl050(pio_addr=0x1c070000, int_num=45, is_mouse=True) 547 vgic = VGic(vcpu_addr=0x2c006000, hv_addr=0x2c004000, ppint=25) 548 cf_ctrl = IdeController(disks=[], pci_func=0, pci_dev=0, pci_bus=2, 549 io_shift = 2, ctrl_offset = 2, Command = 0x1, 550 BAR0 = 0x1C1A0000, BAR0Size = '256B', 551 BAR1 = 0x1C1A0100, BAR1Size = '4096B', --- 154 unchanged lines hidden --- |