1# Copyright (c) 2009-2012 ARM Limited |
2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated --- 34 unchanged lines hidden (view full) --- 44from m5.proxy import * 45from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr, DmaDevice 46from Pci import PciConfigAll 47from Ethernet import NSGigE, IGbE_e1000, IGbE_igb 48from Ide import * 49from Platform import Platform 50from Terminal import Terminal 51from Uart import Uart |
52from PhysicalMemory import * |
53 54class AmbaDevice(BasicPioDevice): 55 type = 'AmbaDevice' 56 abstract = True 57 amba_id = Param.UInt32("ID of AMBA device for kernel detection") 58 59class AmbaIntDevice(AmbaDevice): 60 type = 'AmbaIntDevice' --- 54 unchanged lines hidden (view full) --- 115 116class CpuLocalTimer(BasicPioDevice): 117 type = 'CpuLocalTimer' 118 gic = Param.Gic(Parent.any, "Gic to use for interrupting") 119 int_num_timer = Param.UInt32("Interrrupt number used per-cpu to GIC") 120 int_num_watchdog = Param.UInt32("Interrupt number for per-cpu watchdog to GIC") 121 clock = Param.Clock('1GHz', "Clock speed at which the timer counts") 122 |
123class PL031(AmbaIntDevice): 124 type = 'PL031' 125 time = Param.Time('01/01/2009', "System time to use ('Now' for actual time)") 126 amba_id = 0x00341031 127 |
128class Pl050(AmbaIntDevice): 129 type = 'Pl050' 130 vnc = Param.VncServer(Parent.any, "Vnc server for remote frame buffer display") 131 is_mouse = Param.Bool(False, "Is this interface a mouse, if not a keyboard") 132 int_delay = '1us' 133 amba_id = 0x00141050 134 135class Pl111(AmbaDmaDevice): 136 type = 'Pl111' 137 clock = Param.Clock('24MHz', "Clock speed of the input") 138 vnc = Param.VncServer(Parent.any, "Vnc server for remote frame buffer display") 139 amba_id = 0x00141111 140 141class RealView(Platform): 142 type = 'RealView' 143 system = Param.System(Parent.any, "system") 144 pci_cfg_base = Param.Addr(0, "Base address of PCI Configuraiton Space") |
145 mem_start_addr = Param.Addr(0, "Start address of main memory") 146 max_mem_size = Param.Addr('256MB', "Maximum amount of RAM supported by platform") |
147 |
148 def setupBootLoader(self, mem_bus, cur_sys, loc): 149 self.nvmem = PhysicalMemory(range = AddrRange(Addr('2GB'), size = '64MB'), zero = True) 150 self.nvmem.port = mem_bus.master 151 cur_sys.boot_loader = loc('boot.arm') 152 cur_sys.boot_loader_mem = self.nvmem 153 154 |
155# Reference for memory map and interrupt number 156# RealView Platform Baseboard Explore for Cortex-A9 User Guide(ARM DUI 0440A) 157# Chapter 4: Programmer's Reference 158class RealViewPBX(RealView): 159 uart = Pl011(pio_addr=0x10009000, int_num=44) 160 realview_io = RealViewCtrl(pio_addr=0x10000000) 161 gic = Gic() 162 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000) --- 36 unchanged lines hidden (view full) --- 199 self.gic.pio = bus.master 200 self.l2x0_fake.pio = bus.master 201 self.a9scu.pio = bus.master 202 self.local_cpu_timer.pio = bus.master 203 # Bridge ranges based on excluding what is part of on-chip I/O 204 # (gic, l2x0, a9scu, local_cpu_timer) 205 bridge.ranges = [AddrRange(self.realview_io.pio_addr, 206 self.a9scu.pio_addr - 1), |
207 AddrRange(self.flash_fake.pio_addr, 208 self.flash_fake.pio_addr + \ 209 self.flash_fake.pio_size - 1)] |
210 211 # Attach I/O devices to specified bus object. Can't do this 212 # earlier, since the bus object itself is typically defined at the 213 # System level. 214 def attachIO(self, bus): 215 self.uart.pio = bus.master 216 self.realview_io.pio = bus.master 217 self.timer0.pio = bus.master --- 94 unchanged lines hidden (view full) --- 312 self.sci_fake.pio = bus.master 313 self.aaci_fake.pio = bus.master 314 self.mmc_fake.pio = bus.master 315 self.rtc_fake.pio = bus.master 316 self.flash_fake.pio = bus.master 317 self.smcreg_fake.pio = bus.master 318 319class VExpress_ELT(RealView): |
320 max_mem_size = '2GB' |
321 pci_cfg_base = 0xD0000000 322 elba_uart = Pl011(pio_addr=0xE0009000, int_num=42) 323 uart = Pl011(pio_addr=0xFF009000, int_num=121) 324 realview_io = RealViewCtrl(proc_id0=0x0C000222, pio_addr=0xFF000000) 325 gic = Gic(dist_addr=0xE0201000, cpu_addr=0xE0200100) 326 local_cpu_timer = CpuLocalTimer(int_num_timer=29, int_num_watchdog=30, pio_addr=0xE0200600) 327 v2m_timer0 = Sp804(int_num0=120, int_num1=120, pio_addr=0xFF011000) 328 v2m_timer1 = Sp804(int_num0=121, int_num1=121, pio_addr=0xFF012000) --- 86 unchanged lines hidden (view full) --- 415 self.aaci_fake.pio = bus.master 416 self.elba_aaci_fake.pio = bus.master 417 self.mmc_fake.pio = bus.master 418 self.rtc_fake.pio = bus.master 419 self.spsc_fake.pio = bus.master 420 self.lan_fake.pio = bus.master 421 self.usb_fake.pio = bus.master 422 |
423 424class VExpress_EMM(RealView): 425 mem_start_addr = '2GB' 426 max_mem_size = '2GB' 427 uart = Pl011(pio_addr=0x1c090000, int_num=37) 428 realview_io = RealViewCtrl(proc_id0=0x14000000, proc_id1=0x14000000, pio_addr=0x1C010000) 429 gic = Gic(dist_addr=0x2C001000, cpu_addr=0x2C002000) 430 local_cpu_timer = CpuLocalTimer(int_num_timer=29, int_num_watchdog=30, pio_addr=0x2C080000) 431 timer0 = Sp804(int_num0=34, int_num1=34, pio_addr=0x1C110000, clock0='50MHz', clock1='50MHz') 432 timer1 = Sp804(int_num0=35, int_num1=35, pio_addr=0x1C120000, clock0='50MHz', clock1='50MHz') 433 clcd = Pl111(pio_addr=0x1c1f0000, int_num=46) 434 kmi0 = Pl050(pio_addr=0x1c060000, int_num=44) 435 kmi1 = Pl050(pio_addr=0x1c070000, int_num=45) 436 cf_ctrl = IdeController(disks=[], pci_func=0, pci_dev=0, pci_bus=2, 437 io_shift = 2, ctrl_offset = 2, Command = 0x1, 438 BAR0 = 0x1C1A0000, BAR0Size = '256B', 439 BAR1 = 0x1C1A0100, BAR1Size = '4096B', 440 BAR0LegacyIO = True, BAR1LegacyIO = True) 441 vram = PhysicalMemory(range = AddrRange(0x18000000, size='32MB'), zero = True) 442 rtc = PL031(pio_addr=0x1C170000, int_num=36) 443 444 l2x0_fake = IsaFake(pio_addr=0x2C100000, pio_size=0xfff) 445 uart1_fake = AmbaFake(pio_addr=0x1C0A0000) 446 uart2_fake = AmbaFake(pio_addr=0x1C0B0000) 447 uart3_fake = AmbaFake(pio_addr=0x1C0C0000) 448 sp810_fake = AmbaFake(pio_addr=0x1C020000, ignore_access=True) 449 watchdog_fake = AmbaFake(pio_addr=0x1C0F0000) 450 aaci_fake = AmbaFake(pio_addr=0x1C040000) 451 lan_fake = IsaFake(pio_addr=0x1A000000, pio_size=0xffff) 452 usb_fake = IsaFake(pio_addr=0x1B000000, pio_size=0x1ffff) 453 mmc_fake = AmbaFake(pio_addr=0x1c050000) 454 455 def setupBootLoader(self, mem_bus, cur_sys, loc): 456 self.nvmem = PhysicalMemory(range = AddrRange(0, size = '64MB'), zero = True) 457 self.nvmem.port = mem_bus.master 458 cur_sys.boot_loader = loc('boot_emm.arm') 459 cur_sys.boot_loader_mem = self.nvmem 460 cur_sys.atags_addr = 0x80000100 461 462 # Attach I/O devices that are on chip and also set the appropriate 463 # ranges for the bridge 464 def attachOnChipIO(self, bus, bridge): 465 self.gic.pio = bus.master 466 self.local_cpu_timer.pio = bus.master 467 # Bridge ranges based on excluding what is part of on-chip I/O 468 # (gic, a9scu) 469 bridge.ranges = [AddrRange(0x2F000000, size='16MB'), 470 AddrRange(0x30000000, size='256MB'), 471 AddrRange(0x40000000, size='512MB'), 472 AddrRange(0x18000000, size='64MB'), 473 AddrRange(0x1C000000, size='64MB')] 474 475 # Attach I/O devices to specified bus object. Can't do this 476 # earlier, since the bus object itself is typically defined at the 477 # System level. 478 def attachIO(self, bus): 479 self.uart.pio = bus.master 480 self.realview_io.pio = bus.master 481 self.timer0.pio = bus.master 482 self.timer1.pio = bus.master 483 self.clcd.pio = bus.master 484 self.clcd.dma = bus.slave 485 self.kmi0.pio = bus.master 486 self.kmi1.pio = bus.master 487 self.cf_ctrl.pio = bus.master 488 self.cf_ctrl.config = bus.master 489 self.rtc.pio = bus.master 490 bus.use_default_range = True 491 self.vram.port = bus.master 492 493 self.l2x0_fake.pio = bus.master 494 self.uart1_fake.pio = bus.master 495 self.uart2_fake.pio = bus.master 496 self.uart3_fake.pio = bus.master 497 self.sp810_fake.pio = bus.master 498 self.watchdog_fake.pio = bus.master 499 self.aaci_fake.pio = bus.master 500 self.lan_fake.pio = bus.master 501 self.usb_fake.pio = bus.master 502 self.mmc_fake.pio = bus.master 503 |