1c1
< # Copyright (c) 2009 ARM Limited
---
> # Copyright (c) 2009-2011 ARM Limited
180,181c180,182
< # Attach I/O devices that are on chip
< def attachOnChipIO(self, bus):
---
> # Attach I/O devices that are on chip and also set the appropriate
> # ranges for the bridge
> def attachOnChipIO(self, bus, bridge):
185a187,191
> # Bridge ranges based on excluding what is part of on-chip I/O
> # (gic, l2x0, a9scu, local_cpu_timer)
> bridge.ranges = [AddrRange(self.realview_io.pio_addr,
> self.a9scu.pio_addr - 1),
> AddrRange(self.flash_fake.pio_addr, Addr.max)]
251,252c257,259
< # Attach I/O devices that are on chip
< def attachOnChipIO(self, bus):
---
> # Attach I/O devices that are on chip and also set the appropriate
> # ranges for the bridge
> def attachOnChipIO(self, bus, bridge):
254a262,266
> # Bridge ranges based on excluding what is part of on-chip I/O
> # (gic, l2x0)
> bridge.ranges = [AddrRange(self.realview_io.pio_addr,
> self.gic.cpu_addr - 1),
> AddrRange(self.flash_fake.pio_addr, Addr.max)]
332,333c344,346
< # Attach I/O devices that are on chip
< def attachOnChipIO(self, bus):
---
> # Attach I/O devices that are on chip and also set the appropriate
> # ranges for the bridge
> def attachOnChipIO(self, bus, bridge):
335a349,352
> # Bridge ranges based on excluding what is part of on-chip I/O
> # (gic, a9scu)
> bridge.ranges = [AddrRange(self.pci_cfg_base, self.a9scu.pio_addr - 1),
> AddrRange(self.local_cpu_timer.pio_addr, Addr.max)]