1# Copyright (c) 2009 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Copyright (c) 2006-2007 The Regents of The University of Michigan
14# All rights reserved.
15#
16# Redistribution and use in source and binary forms, with or without
17# modification, are permitted provided that the following conditions are
18# met: redistributions of source code must retain the above copyright
19# notice, this list of conditions and the following disclaimer;
20# redistributions in binary form must reproduce the above copyright
21# notice, this list of conditions and the following disclaimer in the
22# documentation and/or other materials provided with the distribution;
23# neither the name of the copyright holders nor the names of its
24# contributors may be used to endorse or promote products derived from
25# this software without specific prior written permission.
26#
27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38#
39# Authors: Ali Saidi
40# Gabe Black
41# William Wang
42
43from m5.params import *
44from m5.proxy import *
45from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr, DmaDevice
46from Ide import *
47from Platform import Platform
48from Terminal import Terminal
49from Uart import Uart
50
51class AmbaDevice(BasicPioDevice):
52 type = 'AmbaDevice'
53 abstract = True
54 amba_id = Param.UInt32("ID of AMBA device for kernel detection")
55
56class AmbaIntDevice(AmbaDevice):
57 type = 'AmbaIntDevice'
58 abstract = True
59 gic = Param.Gic(Parent.any, "Gic to use for interrupting")
60 int_num = Param.UInt32("Interrupt number that connects to GIC")
61 int_delay = Param.Latency("100ns",
62 "Time between action and interrupt generation by device")
63
64class AmbaDmaDevice(DmaDevice):
65 type = 'AmbaDmaDevice'
66 abstract = True
67 pio_addr = Param.Addr("Address for AMBA slave interface")
68 pio_latency = Param.Latency("10ns", "Time between action and write/read result by AMBA DMA Device")
69 gic = Param.Gic(Parent.any, "Gic to use for interrupting")
70 int_num = Param.UInt32("Interrupt number that connects to GIC")
71 amba_id = Param.UInt32("ID of AMBA device for kernel detection")
72
73class A9SCU(BasicPioDevice):
74 type = 'A9SCU'
75
76class RealViewCtrl(BasicPioDevice):
77 type = 'RealViewCtrl'
| 1# Copyright (c) 2009 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Copyright (c) 2006-2007 The Regents of The University of Michigan
14# All rights reserved.
15#
16# Redistribution and use in source and binary forms, with or without
17# modification, are permitted provided that the following conditions are
18# met: redistributions of source code must retain the above copyright
19# notice, this list of conditions and the following disclaimer;
20# redistributions in binary form must reproduce the above copyright
21# notice, this list of conditions and the following disclaimer in the
22# documentation and/or other materials provided with the distribution;
23# neither the name of the copyright holders nor the names of its
24# contributors may be used to endorse or promote products derived from
25# this software without specific prior written permission.
26#
27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38#
39# Authors: Ali Saidi
40# Gabe Black
41# William Wang
42
43from m5.params import *
44from m5.proxy import *
45from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr, DmaDevice
46from Ide import *
47from Platform import Platform
48from Terminal import Terminal
49from Uart import Uart
50
51class AmbaDevice(BasicPioDevice):
52 type = 'AmbaDevice'
53 abstract = True
54 amba_id = Param.UInt32("ID of AMBA device for kernel detection")
55
56class AmbaIntDevice(AmbaDevice):
57 type = 'AmbaIntDevice'
58 abstract = True
59 gic = Param.Gic(Parent.any, "Gic to use for interrupting")
60 int_num = Param.UInt32("Interrupt number that connects to GIC")
61 int_delay = Param.Latency("100ns",
62 "Time between action and interrupt generation by device")
63
64class AmbaDmaDevice(DmaDevice):
65 type = 'AmbaDmaDevice'
66 abstract = True
67 pio_addr = Param.Addr("Address for AMBA slave interface")
68 pio_latency = Param.Latency("10ns", "Time between action and write/read result by AMBA DMA Device")
69 gic = Param.Gic(Parent.any, "Gic to use for interrupting")
70 int_num = Param.UInt32("Interrupt number that connects to GIC")
71 amba_id = Param.UInt32("ID of AMBA device for kernel detection")
72
73class A9SCU(BasicPioDevice):
74 type = 'A9SCU'
75
76class RealViewCtrl(BasicPioDevice):
77 type = 'RealViewCtrl'
|
78 proc_id = Param.UInt32(0x0C000000, "Platform ID")
| 78 proc_id = Param.UInt32(0x0C000000, "Processor ID, SYS_PROCID")
79 idreg = Param.UInt32(0x00000000, "ID Register, SYS_ID")
|
79
80class Gic(PioDevice):
81 type = 'Gic'
82 dist_addr = Param.Addr(0x1f001000, "Address for distributor")
83 cpu_addr = Param.Addr(0x1f000100, "Address for cpu")
84 dist_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to distributor")
85 cpu_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to cpu interface")
86 int_latency = Param.Latency('10ns', "Delay for interrupt to get to CPU")
87 it_lines = Param.UInt32(128, "Number of interrupt lines supported (max = 1020)")
88
89class AmbaFake(AmbaDevice):
90 type = 'AmbaFake'
91 ignore_access = Param.Bool(False, "Ignore reads/writes to this device, (e.g. IsaFake + AMBA)")
92 amba_id = 0;
93
94class Pl011(Uart):
95 type = 'Pl011'
96 gic = Param.Gic(Parent.any, "Gic to use for interrupting")
97 int_num = Param.UInt32("Interrupt number that connects to GIC")
98 end_on_eot = Param.Bool(False, "End the simulation when a EOT is received on the UART")
99 int_delay = Param.Latency("100ns", "Time between action and interrupt generation by UART")
100
101class Sp804(AmbaDevice):
102 type = 'Sp804'
103 gic = Param.Gic(Parent.any, "Gic to use for interrupting")
104 int_num0 = Param.UInt32("Interrupt number that connects to GIC")
105 clock0 = Param.Clock('1MHz', "Clock speed of the input")
106 int_num1 = Param.UInt32("Interrupt number that connects to GIC")
107 clock1 = Param.Clock('1MHz', "Clock speed of the input")
108 amba_id = 0x00141804
109
110class Pl050(AmbaIntDevice):
111 type = 'Pl050'
112 vnc = Param.VncServer(Parent.any, "Vnc server for remote frame buffer display")
113 is_mouse = Param.Bool(False, "Is this interface a mouse, if not a keyboard")
114 int_delay = '1us'
115 amba_id = 0x00141050
116
117class Pl111(AmbaDmaDevice):
118 type = 'Pl111'
119 clock = Param.Clock('24MHz', "Clock speed of the input")
120 vnc = Param.VncServer(Parent.any, "Vnc server for remote frame buffer display")
121 amba_id = 0x00141111
122
123class RealView(Platform):
124 type = 'RealView'
125 system = Param.System(Parent.any, "system")
126
127# Reference for memory map and interrupt number
128# RealView Platform Baseboard Explore for Cortex-A9 User Guide(ARM DUI 0440A)
129# Chapter 4: Programmer's Reference
130class RealViewPBX(RealView):
131 uart = Pl011(pio_addr=0x10009000, int_num=44)
132 realview_io = RealViewCtrl(pio_addr=0x10000000)
133 gic = Gic()
134 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000)
135 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000)
136 clcd = Pl111(pio_addr=0x10020000, int_num=55)
137 kmi0 = Pl050(pio_addr=0x10006000, int_num=52)
138 kmi1 = Pl050(pio_addr=0x10007000, int_num=53, is_mouse=True)
139 a9scu = A9SCU(pio_addr=0x1f000000)
140 cf_ctrl = IdeController(disks=[], pci_func=0, pci_dev=0, pci_bus=0,
141 io_shift = 1, ctrl_offset = 2, Command = 0x1,
142 BAR0 = 0x18000000, BAR0Size = '16B',
143 BAR1 = 0x18000100, BAR1Size = '1B',
144 BAR0LegacyIO = True, BAR1LegacyIO = True)
145
146
147 l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff)
| 80
81class Gic(PioDevice):
82 type = 'Gic'
83 dist_addr = Param.Addr(0x1f001000, "Address for distributor")
84 cpu_addr = Param.Addr(0x1f000100, "Address for cpu")
85 dist_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to distributor")
86 cpu_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to cpu interface")
87 int_latency = Param.Latency('10ns', "Delay for interrupt to get to CPU")
88 it_lines = Param.UInt32(128, "Number of interrupt lines supported (max = 1020)")
89
90class AmbaFake(AmbaDevice):
91 type = 'AmbaFake'
92 ignore_access = Param.Bool(False, "Ignore reads/writes to this device, (e.g. IsaFake + AMBA)")
93 amba_id = 0;
94
95class Pl011(Uart):
96 type = 'Pl011'
97 gic = Param.Gic(Parent.any, "Gic to use for interrupting")
98 int_num = Param.UInt32("Interrupt number that connects to GIC")
99 end_on_eot = Param.Bool(False, "End the simulation when a EOT is received on the UART")
100 int_delay = Param.Latency("100ns", "Time between action and interrupt generation by UART")
101
102class Sp804(AmbaDevice):
103 type = 'Sp804'
104 gic = Param.Gic(Parent.any, "Gic to use for interrupting")
105 int_num0 = Param.UInt32("Interrupt number that connects to GIC")
106 clock0 = Param.Clock('1MHz', "Clock speed of the input")
107 int_num1 = Param.UInt32("Interrupt number that connects to GIC")
108 clock1 = Param.Clock('1MHz', "Clock speed of the input")
109 amba_id = 0x00141804
110
111class Pl050(AmbaIntDevice):
112 type = 'Pl050'
113 vnc = Param.VncServer(Parent.any, "Vnc server for remote frame buffer display")
114 is_mouse = Param.Bool(False, "Is this interface a mouse, if not a keyboard")
115 int_delay = '1us'
116 amba_id = 0x00141050
117
118class Pl111(AmbaDmaDevice):
119 type = 'Pl111'
120 clock = Param.Clock('24MHz', "Clock speed of the input")
121 vnc = Param.VncServer(Parent.any, "Vnc server for remote frame buffer display")
122 amba_id = 0x00141111
123
124class RealView(Platform):
125 type = 'RealView'
126 system = Param.System(Parent.any, "system")
127
128# Reference for memory map and interrupt number
129# RealView Platform Baseboard Explore for Cortex-A9 User Guide(ARM DUI 0440A)
130# Chapter 4: Programmer's Reference
131class RealViewPBX(RealView):
132 uart = Pl011(pio_addr=0x10009000, int_num=44)
133 realview_io = RealViewCtrl(pio_addr=0x10000000)
134 gic = Gic()
135 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000)
136 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000)
137 clcd = Pl111(pio_addr=0x10020000, int_num=55)
138 kmi0 = Pl050(pio_addr=0x10006000, int_num=52)
139 kmi1 = Pl050(pio_addr=0x10007000, int_num=53, is_mouse=True)
140 a9scu = A9SCU(pio_addr=0x1f000000)
141 cf_ctrl = IdeController(disks=[], pci_func=0, pci_dev=0, pci_bus=0,
142 io_shift = 1, ctrl_offset = 2, Command = 0x1,
143 BAR0 = 0x18000000, BAR0Size = '16B',
144 BAR1 = 0x18000100, BAR1Size = '1B',
145 BAR0LegacyIO = True, BAR1LegacyIO = True)
146
147
148 l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff)
|
148 flash_fake = IsaFake(pio_addr=0x40000000, pio_size=0x4000000)
| 149 flash_fake = IsaFake(pio_addr=0x40000000, pio_size=0x20000000)
|
149 dmac_fake = AmbaFake(pio_addr=0x10030000)
150 uart1_fake = AmbaFake(pio_addr=0x1000a000)
151 uart2_fake = AmbaFake(pio_addr=0x1000b000)
152 uart3_fake = AmbaFake(pio_addr=0x1000c000)
153 smc_fake = AmbaFake(pio_addr=0x100e1000)
154 sp810_fake = AmbaFake(pio_addr=0x10001000, ignore_access=True)
155 watchdog_fake = AmbaFake(pio_addr=0x10010000)
156 gpio0_fake = AmbaFake(pio_addr=0x10013000)
157 gpio1_fake = AmbaFake(pio_addr=0x10014000)
158 gpio2_fake = AmbaFake(pio_addr=0x10015000)
159 ssp_fake = AmbaFake(pio_addr=0x1000d000)
160 sci_fake = AmbaFake(pio_addr=0x1000e000)
161 aaci_fake = AmbaFake(pio_addr=0x10004000)
162 mmc_fake = AmbaFake(pio_addr=0x10005000)
163 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031)
164
165
166 # Attach I/O devices that are on chip
167 def attachOnChipIO(self, bus):
168 self.gic.pio = bus.port
169 self.l2x0_fake.pio = bus.port
170 self.a9scu.pio = bus.port
171
172 # Attach I/O devices to specified bus object. Can't do this
173 # earlier, since the bus object itself is typically defined at the
174 # System level.
175 def attachIO(self, bus):
176 self.uart.pio = bus.port
177 self.realview_io.pio = bus.port
178 self.timer0.pio = bus.port
179 self.timer1.pio = bus.port
180 self.clcd.pio = bus.port
181 self.kmi0.pio = bus.port
182 self.kmi1.pio = bus.port
183 self.cf_ctrl.pio = bus.port
184 self.dmac_fake.pio = bus.port
185 self.uart1_fake.pio = bus.port
186 self.uart2_fake.pio = bus.port
187 self.uart3_fake.pio = bus.port
188 self.smc_fake.pio = bus.port
189 self.sp810_fake.pio = bus.port
190 self.watchdog_fake.pio = bus.port
191 self.gpio0_fake.pio = bus.port
192 self.gpio1_fake.pio = bus.port
193 self.gpio2_fake.pio = bus.port
194 self.ssp_fake.pio = bus.port
195 self.sci_fake.pio = bus.port
196 self.aaci_fake.pio = bus.port
197 self.mmc_fake.pio = bus.port
198 self.rtc_fake.pio = bus.port
199 self.flash_fake.pio = bus.port
200
201# Reference for memory map and interrupt number
202# RealView Emulation Baseboard User Guide (ARM DUI 0143B)
203# Chapter 4: Programmer's Reference
204class RealViewEB(RealView):
205 uart = Pl011(pio_addr=0x10009000, int_num=44)
206 realview_io = RealViewCtrl(pio_addr=0x10000000)
207 gic = Gic(dist_addr=0x10041000, cpu_addr=0x10040000)
208 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000)
209 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000)
210 clcd = Pl111(pio_addr=0x10020000, int_num=23)
211 kmi0 = Pl050(pio_addr=0x10006000, int_num=20)
212 kmi1 = Pl050(pio_addr=0x10007000, int_num=21, is_mouse=True)
213
214 l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff, warn_access="1")
| 150 dmac_fake = AmbaFake(pio_addr=0x10030000)
151 uart1_fake = AmbaFake(pio_addr=0x1000a000)
152 uart2_fake = AmbaFake(pio_addr=0x1000b000)
153 uart3_fake = AmbaFake(pio_addr=0x1000c000)
154 smc_fake = AmbaFake(pio_addr=0x100e1000)
155 sp810_fake = AmbaFake(pio_addr=0x10001000, ignore_access=True)
156 watchdog_fake = AmbaFake(pio_addr=0x10010000)
157 gpio0_fake = AmbaFake(pio_addr=0x10013000)
158 gpio1_fake = AmbaFake(pio_addr=0x10014000)
159 gpio2_fake = AmbaFake(pio_addr=0x10015000)
160 ssp_fake = AmbaFake(pio_addr=0x1000d000)
161 sci_fake = AmbaFake(pio_addr=0x1000e000)
162 aaci_fake = AmbaFake(pio_addr=0x10004000)
163 mmc_fake = AmbaFake(pio_addr=0x10005000)
164 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031)
165
166
167 # Attach I/O devices that are on chip
168 def attachOnChipIO(self, bus):
169 self.gic.pio = bus.port
170 self.l2x0_fake.pio = bus.port
171 self.a9scu.pio = bus.port
172
173 # Attach I/O devices to specified bus object. Can't do this
174 # earlier, since the bus object itself is typically defined at the
175 # System level.
176 def attachIO(self, bus):
177 self.uart.pio = bus.port
178 self.realview_io.pio = bus.port
179 self.timer0.pio = bus.port
180 self.timer1.pio = bus.port
181 self.clcd.pio = bus.port
182 self.kmi0.pio = bus.port
183 self.kmi1.pio = bus.port
184 self.cf_ctrl.pio = bus.port
185 self.dmac_fake.pio = bus.port
186 self.uart1_fake.pio = bus.port
187 self.uart2_fake.pio = bus.port
188 self.uart3_fake.pio = bus.port
189 self.smc_fake.pio = bus.port
190 self.sp810_fake.pio = bus.port
191 self.watchdog_fake.pio = bus.port
192 self.gpio0_fake.pio = bus.port
193 self.gpio1_fake.pio = bus.port
194 self.gpio2_fake.pio = bus.port
195 self.ssp_fake.pio = bus.port
196 self.sci_fake.pio = bus.port
197 self.aaci_fake.pio = bus.port
198 self.mmc_fake.pio = bus.port
199 self.rtc_fake.pio = bus.port
200 self.flash_fake.pio = bus.port
201
202# Reference for memory map and interrupt number
203# RealView Emulation Baseboard User Guide (ARM DUI 0143B)
204# Chapter 4: Programmer's Reference
205class RealViewEB(RealView):
206 uart = Pl011(pio_addr=0x10009000, int_num=44)
207 realview_io = RealViewCtrl(pio_addr=0x10000000)
208 gic = Gic(dist_addr=0x10041000, cpu_addr=0x10040000)
209 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000)
210 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000)
211 clcd = Pl111(pio_addr=0x10020000, int_num=23)
212 kmi0 = Pl050(pio_addr=0x10006000, int_num=20)
213 kmi1 = Pl050(pio_addr=0x10007000, int_num=21, is_mouse=True)
214
215 l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff, warn_access="1")
|
| 216 flash_fake = IsaFake(pio_addr=0x40000000, pio_size=0x20000000-1)
|
215 dmac_fake = AmbaFake(pio_addr=0x10030000)
216 uart1_fake = AmbaFake(pio_addr=0x1000a000)
217 uart2_fake = AmbaFake(pio_addr=0x1000b000)
218 uart3_fake = AmbaFake(pio_addr=0x1000c000)
| 217 dmac_fake = AmbaFake(pio_addr=0x10030000)
218 uart1_fake = AmbaFake(pio_addr=0x1000a000)
219 uart2_fake = AmbaFake(pio_addr=0x1000b000)
220 uart3_fake = AmbaFake(pio_addr=0x1000c000)
|
| 221 smcreg_fake = IsaFake(pio_addr=0x10080000, pio_size=0x10000-1)
|
219 smc_fake = AmbaFake(pio_addr=0x100e1000)
220 sp810_fake = AmbaFake(pio_addr=0x10001000, ignore_access=True)
221 watchdog_fake = AmbaFake(pio_addr=0x10010000)
222 gpio0_fake = AmbaFake(pio_addr=0x10013000)
223 gpio1_fake = AmbaFake(pio_addr=0x10014000)
224 gpio2_fake = AmbaFake(pio_addr=0x10015000)
225 ssp_fake = AmbaFake(pio_addr=0x1000d000)
226 sci_fake = AmbaFake(pio_addr=0x1000e000)
227 aaci_fake = AmbaFake(pio_addr=0x10004000)
228 mmc_fake = AmbaFake(pio_addr=0x10005000)
229 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031)
230
231
232
233 # Attach I/O devices that are on chip
234 def attachOnChipIO(self, bus):
235 self.gic.pio = bus.port
236 self.l2x0_fake.pio = bus.port
237
238 # Attach I/O devices to specified bus object. Can't do this
239 # earlier, since the bus object itself is typically defined at the
240 # System level.
241 def attachIO(self, bus):
242 self.uart.pio = bus.port
243 self.realview_io.pio = bus.port
244 self.timer0.pio = bus.port
245 self.timer1.pio = bus.port
246 self.clcd.pio = bus.port
247 self.kmi0.pio = bus.port
248 self.kmi1.pio = bus.port
249 self.dmac_fake.pio = bus.port
250 self.uart1_fake.pio = bus.port
251 self.uart2_fake.pio = bus.port
252 self.uart3_fake.pio = bus.port
253 self.smc_fake.pio = bus.port
254 self.sp810_fake.pio = bus.port
255 self.watchdog_fake.pio = bus.port
256 self.gpio0_fake.pio = bus.port
257 self.gpio1_fake.pio = bus.port
258 self.gpio2_fake.pio = bus.port
259 self.ssp_fake.pio = bus.port
260 self.sci_fake.pio = bus.port
261 self.aaci_fake.pio = bus.port
262 self.mmc_fake.pio = bus.port
263 self.rtc_fake.pio = bus.port
| 222 smc_fake = AmbaFake(pio_addr=0x100e1000)
223 sp810_fake = AmbaFake(pio_addr=0x10001000, ignore_access=True)
224 watchdog_fake = AmbaFake(pio_addr=0x10010000)
225 gpio0_fake = AmbaFake(pio_addr=0x10013000)
226 gpio1_fake = AmbaFake(pio_addr=0x10014000)
227 gpio2_fake = AmbaFake(pio_addr=0x10015000)
228 ssp_fake = AmbaFake(pio_addr=0x1000d000)
229 sci_fake = AmbaFake(pio_addr=0x1000e000)
230 aaci_fake = AmbaFake(pio_addr=0x10004000)
231 mmc_fake = AmbaFake(pio_addr=0x10005000)
232 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031)
233
234
235
236 # Attach I/O devices that are on chip
237 def attachOnChipIO(self, bus):
238 self.gic.pio = bus.port
239 self.l2x0_fake.pio = bus.port
240
241 # Attach I/O devices to specified bus object. Can't do this
242 # earlier, since the bus object itself is typically defined at the
243 # System level.
244 def attachIO(self, bus):
245 self.uart.pio = bus.port
246 self.realview_io.pio = bus.port
247 self.timer0.pio = bus.port
248 self.timer1.pio = bus.port
249 self.clcd.pio = bus.port
250 self.kmi0.pio = bus.port
251 self.kmi1.pio = bus.port
252 self.dmac_fake.pio = bus.port
253 self.uart1_fake.pio = bus.port
254 self.uart2_fake.pio = bus.port
255 self.uart3_fake.pio = bus.port
256 self.smc_fake.pio = bus.port
257 self.sp810_fake.pio = bus.port
258 self.watchdog_fake.pio = bus.port
259 self.gpio0_fake.pio = bus.port
260 self.gpio1_fake.pio = bus.port
261 self.gpio2_fake.pio = bus.port
262 self.ssp_fake.pio = bus.port
263 self.sci_fake.pio = bus.port
264 self.aaci_fake.pio = bus.port
265 self.mmc_fake.pio = bus.port
266 self.rtc_fake.pio = bus.port
|
| 267 self.flash_fake.pio = bus.port
268 self.smcreg_fake.pio = bus.port
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264
| 269
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