1# Copyright (c) 2009-2017 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38#
39# Authors: Ali Saidi
40# Gabe Black
41# William Wang
42
43from m5.params import *
44from m5.proxy import *
45from ClockDomain import ClockDomain
46from VoltageDomain import VoltageDomain
47from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr, DmaDevice
48from PciHost import *
49from Ethernet import NSGigE, IGbE_igb, IGbE_e1000
50from Ide import *
51from Platform import Platform
52from Terminal import Terminal
53from Uart import Uart
54from SimpleMemory import SimpleMemory
55from Gic import *
56from EnergyCtrl import EnergyCtrl
57from ClockedObject import ClockedObject
58from ClockDomain import SrcClockDomain
59from SubSystem import SubSystem
60from Graphics import ImageFormat
61
62# Platforms with KVM support should generally use in-kernel GIC
63# emulation. Use a GIC model that automatically switches between
64# gem5's GIC model and KVM's GIC model if KVM is available.
65try:
66 from KvmGic import MuxingKvmGic
67 kvm_gicv2_class = MuxingKvmGic
68except ImportError:

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116
117class RealViewCtrl(BasicPioDevice):
118 type = 'RealViewCtrl'
119 cxx_header = "dev/arm/rv_ctrl.hh"
120 proc_id0 = Param.UInt32(0x0C000000, "Processor ID, SYS_PROCID")
121 proc_id1 = Param.UInt32(0x0C000222, "Processor ID, SYS_PROCID1")
122 idreg = Param.UInt32(0x00000000, "ID Register, SYS_ID")
123
124class RealViewOsc(ClockDomain):
125 type = 'RealViewOsc'
126 cxx_header = "dev/arm/rv_ctrl.hh"
127
128 parent = Param.RealViewCtrl(Parent.any, "RealView controller")
129
130 # TODO: We currently don't have the notion of a clock source,
131 # which means we have to associate oscillators with a voltage

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138 # about the site/position/dcc/device allocation.
139 site = Param.UInt8("Board Site")
140 position = Param.UInt8("Position in device stack")
141 dcc = Param.UInt8("Daughterboard Configuration Controller")
142 device = Param.UInt8("Device ID")
143
144 freq = Param.Clock("Default frequency")
145
146class RealViewTemperatureSensor(SimObject):
147 type = 'RealViewTemperatureSensor'
148 cxx_header = "dev/arm/rv_ctrl.hh"
149
150 parent = Param.RealViewCtrl(Parent.any, "RealView controller")
151
152 system = Param.System(Parent.any, "system")
153

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176 osc_mcc = Osc(device=0, freq="50MHz")
177 osc_clcd = Osc(device=1, freq="23.75MHz")
178 osc_peripheral = Osc(device=2, freq="24MHz")
179 osc_system_bus = Osc(device=4, freq="24MHz")
180
181 # See Table 4.19 in ARM DUI 0447J (Motherboard Express uATX TRM).
182 temp_crtl = Temperature(device=0)
183
184class CoreTile2A15DCC(SubSystem):
185 """ARM CoreTile Express A15x2 Daughterboard Configuration Controller
186
187This subsystem describes a subset of the devices that sit behind the
188daughterboard configuration controller on a CoreTile Express A15x2. See
189ARM DUI 0604E for details.
190 """
191
192 class Osc(RealViewOsc):
193 site, position, dcc = (1, 0, 0)
194
195 # See Table 2.8 in ARM DUI 0604E (CoreTile Express A15x2 TRM)
196 osc_cpu = Osc(device=0, freq="60MHz")
197 osc_hsbm = Osc(device=4, freq="40MHz")
198 osc_pxl = Osc(device=5, freq="23.75MHz")
199 osc_smb = Osc(device=6, freq="50MHz")
200 osc_sys = Osc(device=7, freq="60MHz")
201 osc_ddr = Osc(device=8, freq="40MHz")
202
203class VGic(PioDevice):
204 type = 'VGic'
205 cxx_header = "dev/arm/vgic.hh"
206 gic = Param.BaseGic(Parent.any, "Gic to use for interrupting")
207 platform = Param.Platform(Parent.any, "Platform this device is part of.")
208 vcpu_addr = Param.Addr(0, "Address for vcpu interfaces")
209 hv_addr = Param.Addr(0, "Address for hv control")
210 pio_delay = Param.Latency('10ns', "Delay for PIO r/w")
211 # The number of list registers is not currently configurable at runtime.
212 ppint = Param.UInt32("HV maintenance interrupt number")
213
214class AmbaFake(AmbaPioDevice):
215 type = 'AmbaFake'
216 cxx_header = "dev/arm/amba_fake.hh"
217 ignore_access = Param.Bool(False, "Ignore reads/writes to this device, (e.g. IsaFake + AMBA)")
218 amba_id = 0;
219
220class Pl011(Uart):
221 type = 'Pl011'
222 cxx_header = "dev/arm/pl011.hh"
223 gic = Param.BaseGic(Parent.any, "Gic to use for interrupting")
224 int_num = Param.UInt32("Interrupt number that connects to GIC")
225 end_on_eot = Param.Bool(False, "End the simulation when a EOT is received on the UART")
226 int_delay = Param.Latency("100ns", "Time between action and interrupt generation by UART")
227
228class Sp804(AmbaPioDevice):
229 type = 'Sp804'
230 cxx_header = "dev/arm/timer_sp804.hh"
231 gic = Param.BaseGic(Parent.any, "Gic to use for interrupting")
232 int_num0 = Param.UInt32("Interrupt number that connects to GIC")
233 clock0 = Param.Clock('1MHz', "Clock speed of the input")
234 int_num1 = Param.UInt32("Interrupt number that connects to GIC")
235 clock1 = Param.Clock('1MHz', "Clock speed of the input")

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253 cxx_header = "dev/arm/generic_timer.hh"
254 system = Param.ArmSystem(Parent.any, "system")
255 gic = Param.BaseGic(Parent.any, "GIC to use for interrupting")
256 # @todo: for now only two timers per CPU is supported, which is the
257 # normal behaviour when security extensions are disabled.
258 int_phys = Param.UInt32("Physical timer interrupt number")
259 int_virt = Param.UInt32("Virtual timer interrupt number")
260
261class GenericTimerMem(PioDevice):
262 type = 'GenericTimerMem'
263 cxx_header = "dev/arm/generic_timer.hh"
264 gic = Param.BaseGic(Parent.any, "GIC to use for interrupting")
265
266 base = Param.Addr(0, "Base address")
267
268 int_phys = Param.UInt32("Interrupt number")
269 int_virt = Param.UInt32("Interrupt number")
270
271class PL031(AmbaIntDevice):
272 type = 'PL031'
273 cxx_header = "dev/arm/rtc_pl031.hh"
274 time = Param.Time('01/01/2009', "System time to use ('Now' for actual time)")
275 amba_id = 0x00341031
276
277class Pl050(AmbaIntDevice):
278 type = 'Pl050'
279 cxx_header = "dev/arm/kmi.hh"
280 vnc = Param.VncInput(Parent.any, "Vnc server for remote frame buffer display")
281 is_mouse = Param.Bool(False, "Is this interface a mouse, if not a keyboard")
282 int_delay = '1us'
283 amba_id = 0x00141050
284
285class Pl111(AmbaDmaDevice):
286 type = 'Pl111'
287 cxx_header = "dev/arm/pl111.hh"
288 pixel_clock = Param.Clock('24MHz', "Pixel clock")
289 vnc = Param.VncInput(Parent.any, "Vnc server for remote frame buffer display")
290 amba_id = 0x00141111
291 enable_capture = Param.Bool(True, "capture frame to system.framebuffer.bmp")
292

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307
308 pixel_buffer_size = Param.MemorySize32("2kB", "Size of address range")
309
310 pxl_clk = Param.ClockDomain("Pixel clock source")
311 pixel_chunk = Param.Unsigned(32, "Number of pixels to handle in one batch")
312 virt_refresh_rate = Param.Frequency("20Hz", "Frame refresh rate "
313 "in KVM mode")
314
315class RealView(Platform):
316 type = 'RealView'
317 cxx_header = "dev/arm/realview.hh"
318 system = Param.System(Parent.any, "system")
319 _mem_regions = [(Addr(0), Addr('256MB'))]
320
321 def _on_chip_devices(self):
322 return []

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367 def setupBootLoader(self, mem_bus, cur_sys, loc):
368 self.nvmem = SimpleMemory(range = AddrRange('2GB', size = '64MB'),
369 conf_table_reported = False)
370 self.nvmem.port = mem_bus.master
371 cur_sys.boot_loader = loc('boot.arm')
372 cur_sys.atags_addr = 0x100
373 cur_sys.load_offset = 0
374
375
376# Reference for memory map and interrupt number
377# RealView Platform Baseboard Explore for Cortex-A9 User Guide(ARM DUI 0440A)
378# Chapter 4: Programmer's Reference
379class RealViewPBX(RealView):
380 uart = Pl011(pio_addr=0x10009000, int_num=44)
381 realview_io = RealViewCtrl(pio_addr=0x10000000)
382 mcc = VExpressMCC()
383 dcc = CoreTile2A15DCC()

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892 def _on_chip_devices(self):
893 return [
894 self.gic, self.vgic, self.gicv2m,
895 self.hdlcd,
896 self.generic_timer,
897 ]
898
899 ### Off-chip devices ###
900 uart0 = Pl011(pio_addr=0x1c090000, int_num=37)
901
902 kmi0 = Pl050(pio_addr=0x1c060000, int_num=44)
903 kmi1 = Pl050(pio_addr=0x1c070000, int_num=45, is_mouse=True)
904
905 rtc = PL031(pio_addr=0x1c170000, int_num=36)
906
907 ### gem5-specific off-chip devices ###

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912
913 energy_ctrl = EnergyCtrl(pio_addr=0x10000000)
914
915
916 def _off_chip_devices(self):
917 return [
918 self.realview_io,
919 self.uart0,
920 self.kmi0, self.kmi1,
921 self.rtc,
922 self.pci_host,
923 self.energy_ctrl,
924 ]
925
926 def attachPciDevice(self, device, *args, **kwargs):
927 device.host = self.pci_host
928 self._attach_device(device, *args, **kwargs)
929
930 def setupBootLoader(self, mem_bus, cur_sys, loc):
931 self.nvmem = SimpleMemory(range=AddrRange(0, size='64MB'),
932 conf_table_reported=False)
933 self.nvmem.port = mem_bus.master
934 if not cur_sys.boot_loader:
935 cur_sys.boot_loader = [ loc('boot_emm.arm64'), loc('boot_emm.arm') ]
936 cur_sys.atags_addr = 0x8000000
937 cur_sys.load_offset = 0x80000000
938
939 # Setup m5ops. It's technically not a part of the boot
940 # loader, but this is the only place we can configure the
941 # system.
942 cur_sys.m5ops_base = 0x10010000