Gic.py (13014:a4f71c3dc602) Gic.py (13504:5a01198080fa)
1# Copyright (c) 2012-2013, 2017-2018 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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90
91class Gicv2m(PioDevice):
92 type = 'Gicv2m'
93 cxx_header = "dev/arm/gic_v2m.hh"
94
95 pio_delay = Param.Latency('10ns', "Delay for PIO r/w")
96 gic = Param.BaseGic(Parent.any, "Gic on which to trigger interrupts")
97 frames = VectorParam.Gicv2mFrame([], "Power of two number of frames")
1# Copyright (c) 2012-2013, 2017-2018 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

--- 81 unchanged lines hidden (view full) ---

90
91class Gicv2m(PioDevice):
92 type = 'Gicv2m'
93 cxx_header = "dev/arm/gic_v2m.hh"
94
95 pio_delay = Param.Latency('10ns', "Delay for PIO r/w")
96 gic = Param.BaseGic(Parent.any, "Gic on which to trigger interrupts")
97 frames = VectorParam.Gicv2mFrame([], "Power of two number of frames")
98
99class VGic(PioDevice):
100 type = 'VGic'
101 cxx_header = "dev/arm/vgic.hh"
102 gic = Param.BaseGic(Parent.any, "Gic to use for interrupting")
103 platform = Param.Platform(Parent.any, "Platform this device is part of.")
104 vcpu_addr = Param.Addr(0, "Address for vcpu interfaces")
105 hv_addr = Param.Addr(0, "Address for hv control")
106 pio_delay = Param.Latency('10ns', "Delay for PIO r/w")
107 # The number of list registers is not currently configurable at runtime.
108 ppint = Param.UInt32("HV maintenance interrupt number")
109
110 def generateDeviceTree(self, state):
111 gic = self.gic.unproxy(self)
112
113 node = FdtNode("interrupt-controller")
114 node.appendCompatible(["gem5,gic", "arm,cortex-a15-gic",
115 "arm,cortex-a9-gic"])
116 node.append(FdtPropertyWords("#interrupt-cells", [3]))
117 node.append(FdtPropertyWords("#address-cells", [0]))
118 node.append(FdtProperty("interrupt-controller"))
119
120 regs = (
121 state.addrCells(gic.dist_addr) +
122 state.sizeCells(0x1000) +
123 state.addrCells(gic.cpu_addr) +
124 state.sizeCells(0x1000) +
125 state.addrCells(self.hv_addr) +
126 state.sizeCells(0x2000) +
127 state.addrCells(self.vcpu_addr) +
128 state.sizeCells(0x2000) )
129
130 node.append(FdtPropertyWords("reg", regs))
131 node.append(FdtPropertyWords("interrupts",
132 [1, int(self.ppint)-16, 0xf04]))
133
134 node.appendPhandle(gic)
135
136 yield node