1# Copyright (c) 2012-2013, 2017-2019 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 173 unchanged lines hidden (view full) --- 182 dma = MasterPort("DMA port") 183 pio_size = Param.Unsigned(0x20000, "Gicv3Its pio size") 184 185 # CIL [36] = 0: ITS supports 16-bit CollectionID 186 # Devbits [17:13] = 0b100011: ITS supports 23 DeviceID bits 187 # ID_bits [12:8] = 0b11111: ITS supports 31 EventID bits 188 gits_typer = Param.UInt64(0x30023F01, "GITS_TYPER RO value") 189 |
190 def generateDeviceTree(self, state): 191 node = self.generateBasicPioDeviceNode(state, "gic-its", self.pio_addr, 192 self.pio_size) 193 node.appendCompatible(["arm,gic-v3-its"]) 194 node.append(FdtProperty("msi-controller")) 195 node.append(FdtPropertyWords("#msi-cells", [1])) 196 197 return node 198 |
199class Gicv3(BaseGic): 200 type = 'Gicv3' 201 cxx_header = "dev/arm/gic_v3.hh" 202 203 # Used for DTB autogeneration 204 _state = FdtState(addr_cells=2, size_cells=2, interrupt_cells=3) 205 206 its = Param.Gicv3Its(Gicv3Its(), "GICv3 Interrupt Translation Service") --- 51 unchanged lines hidden (view full) --- 258 state.sizeCells(0x2000000) ) 259 260 node.append(FdtPropertyWords("reg", regs)) 261 node.append(FdtPropertyWords("interrupts", 262 self.interruptCells(1, int(self.maint_int.num)-16, 0xf04))) 263 264 node.appendPhandle(self) 265 |
266 # Generate the ITS device tree 267 node.append(self.its.generateDeviceTree(self._state)) 268 |
269 yield node |