tsunami_io.cc (11793:ef606668d247) | tsunami_io.cc (13232:0e63107dae56) |
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1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 87 unchanged lines hidden (view full) --- 96 97 DPRINTF(Tsunami, "io read va=%#x size=%d IOPorrt=%#x\n", pkt->getAddr(), 98 pkt->getSize(), daddr); 99 100 if (pkt->getSize() == sizeof(uint8_t)) { 101 switch(daddr) { 102 // PIC1 mask read 103 case TSDEV_PIC1_MASK: | 1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 87 unchanged lines hidden (view full) --- 96 97 DPRINTF(Tsunami, "io read va=%#x size=%d IOPorrt=%#x\n", pkt->getAddr(), 98 pkt->getSize(), daddr); 99 100 if (pkt->getSize() == sizeof(uint8_t)) { 101 switch(daddr) { 102 // PIC1 mask read 103 case TSDEV_PIC1_MASK: |
104 pkt->set(~mask1); | 104 pkt->setLE(~mask1); |
105 break; 106 case TSDEV_PIC2_MASK: | 105 break; 106 case TSDEV_PIC2_MASK: |
107 pkt->set(~mask2); | 107 pkt->setLE(~mask2); |
108 break; 109 case TSDEV_PIC1_ISR: 110 // !!! If this is modified 64bit case needs to be too 111 // Pal code has to do a 64 bit physical read because there is 112 // no load physical byte instruction | 108 break; 109 case TSDEV_PIC1_ISR: 110 // !!! If this is modified 64bit case needs to be too 111 // Pal code has to do a 64 bit physical read because there is 112 // no load physical byte instruction |
113 pkt->set(picr); | 113 pkt->setLE(picr); |
114 break; 115 case TSDEV_PIC2_ISR: 116 // PIC2 not implemnted... just return 0 | 114 break; 115 case TSDEV_PIC2_ISR: 116 // PIC2 not implemnted... just return 0 |
117 pkt->set(0x00); | 117 pkt->setLE(0x00); |
118 break; 119 case TSDEV_TMR0_DATA: | 118 break; 119 case TSDEV_TMR0_DATA: |
120 pkt->set(pitimer.readCounter(0)); | 120 pkt->setLE(pitimer.readCounter(0)); |
121 break; 122 case TSDEV_TMR1_DATA: | 121 break; 122 case TSDEV_TMR1_DATA: |
123 pkt->set(pitimer.readCounter(1)); | 123 pkt->setLE(pitimer.readCounter(1)); |
124 break; 125 case TSDEV_TMR2_DATA: | 124 break; 125 case TSDEV_TMR2_DATA: |
126 pkt->set(pitimer.readCounter(2)); | 126 pkt->setLE(pitimer.readCounter(2)); |
127 break; 128 case TSDEV_RTC_DATA: | 127 break; 128 case TSDEV_RTC_DATA: |
129 pkt->set(rtc.readData(rtcAddr)); | 129 pkt->setLE(rtc.readData(rtcAddr)); |
130 break; 131 case TSDEV_CTRL_PORTB: 132 if (pitimer.outputHigh(2)) | 130 break; 131 case TSDEV_CTRL_PORTB: 132 if (pitimer.outputHigh(2)) |
133 pkt->set(PORTB_SPKR_HIGH); | 133 pkt->setLE(PORTB_SPKR_HIGH); |
134 else | 134 else |
135 pkt->set(0x00); | 135 pkt->setLE(0x00); |
136 break; 137 default: 138 panic("I/O Read - va%#x size %d\n", pkt->getAddr(), pkt->getSize()); 139 } 140 } else if (pkt->getSize() == sizeof(uint64_t)) { 141 if (daddr == TSDEV_PIC1_ISR) | 136 break; 137 default: 138 panic("I/O Read - va%#x size %d\n", pkt->getAddr(), pkt->getSize()); 139 } 140 } else if (pkt->getSize() == sizeof(uint64_t)) { 141 if (daddr == TSDEV_PIC1_ISR) |
142 pkt->set | 142 pkt->setLE<uint64_t>(picr); |
143 else 144 panic("I/O Read - invalid addr - va %#x size %d\n", 145 pkt->getAddr(), pkt->getSize()); 146 } else { 147 panic("I/O Read - invalid size - va %#x size %d\n", pkt->getAddr(), pkt->getSize()); 148 } 149 pkt->makeAtomicResponse(); 150 return pioDelay; 151} 152 153Tick 154TsunamiIO::write(PacketPtr pkt) 155{ 156 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 157 Addr daddr = pkt->getAddr() - pioAddr; 158 159 DPRINTF(Tsunami, "io write - va=%#x size=%d IOPort=%#x Data=%#x\n", | 143 else 144 panic("I/O Read - invalid addr - va %#x size %d\n", 145 pkt->getAddr(), pkt->getSize()); 146 } else { 147 panic("I/O Read - invalid size - va %#x size %d\n", pkt->getAddr(), pkt->getSize()); 148 } 149 pkt->makeAtomicResponse(); 150 return pioDelay; 151} 152 153Tick 154TsunamiIO::write(PacketPtr pkt) 155{ 156 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 157 Addr daddr = pkt->getAddr() - pioAddr; 158 159 DPRINTF(Tsunami, "io write - va=%#x size=%d IOPort=%#x Data=%#x\n", |
160 pkt->getAddr(), pkt->getSize(), pkt->getAddr() & 0xfff, (uint32_t)pkt->get<uint8_t>()); | 160 pkt->getAddr(), pkt->getSize(), pkt->getAddr() & 0xfff, 161 (uint32_t)pkt->getLE<uint8_t>()); |
161 162 assert(pkt->getSize() == sizeof(uint8_t)); 163 164 switch(daddr) { 165 case TSDEV_PIC1_MASK: | 162 163 assert(pkt->getSize() == sizeof(uint8_t)); 164 165 switch(daddr) { 166 case TSDEV_PIC1_MASK: |
166 mask1 = ~(pkt->get | 167 mask1 = ~(pkt->getLE<uint8_t>()); |
167 if ((picr & mask1) && !picInterrupting) { 168 picInterrupting = true; 169 tsunami->cchip->postDRIR(55); 170 DPRINTF(Tsunami, "posting pic interrupt to cchip\n"); 171 } 172 if ((!(picr & mask1)) && picInterrupting) { 173 picInterrupting = false; 174 tsunami->cchip->clearDRIR(55); 175 DPRINTF(Tsunami, "clearing pic interrupt\n"); 176 } 177 break; 178 case TSDEV_PIC2_MASK: | 168 if ((picr & mask1) && !picInterrupting) { 169 picInterrupting = true; 170 tsunami->cchip->postDRIR(55); 171 DPRINTF(Tsunami, "posting pic interrupt to cchip\n"); 172 } 173 if ((!(picr & mask1)) && picInterrupting) { 174 picInterrupting = false; 175 tsunami->cchip->clearDRIR(55); 176 DPRINTF(Tsunami, "clearing pic interrupt\n"); 177 } 178 break; 179 case TSDEV_PIC2_MASK: |
179 mask2 = pkt->get | 180 mask2 = pkt->getLE<uint8_t>(); |
180 //PIC2 Not implemented to interrupt 181 break; 182 case TSDEV_PIC1_ACK: 183 // clear the interrupt on the PIC | 181 //PIC2 Not implemented to interrupt 182 break; 183 case TSDEV_PIC1_ACK: 184 // clear the interrupt on the PIC |
184 picr &= ~(1 << (pkt->get | 185 picr &= ~(1 << (pkt->getLE<uint8_t>() & 0xF)); |
185 if (!(picr & mask1)) 186 tsunami->cchip->clearDRIR(55); 187 break; 188 case TSDEV_DMA1_MODE: | 186 if (!(picr & mask1)) 187 tsunami->cchip->clearDRIR(55); 188 break; 189 case TSDEV_DMA1_MODE: |
189 mode1 = pkt->get | 190 mode1 = pkt->getLE<uint8_t>(); |
190 break; 191 case TSDEV_DMA2_MODE: | 191 break; 192 case TSDEV_DMA2_MODE: |
192 mode2 = pkt->get | 193 mode2 = pkt->getLE<uint8_t>(); |
193 break; 194 case TSDEV_TMR0_DATA: | 194 break; 195 case TSDEV_TMR0_DATA: |
195 pitimer.writeCounter(0, pkt->get | 196 pitimer.writeCounter(0, pkt->getLE<uint8_t>()); |
196 break; 197 case TSDEV_TMR1_DATA: | 197 break; 198 case TSDEV_TMR1_DATA: |
198 pitimer.writeCounter(1, pkt->get | 199 pitimer.writeCounter(1, pkt->getLE<uint8_t>()); |
199 break; 200 case TSDEV_TMR2_DATA: | 200 break; 201 case TSDEV_TMR2_DATA: |
201 pitimer.writeCounter(2, pkt->get | 202 pitimer.writeCounter(2, pkt->getLE<uint8_t>()); |
202 break; 203 case TSDEV_TMR_CTRL: | 203 break; 204 case TSDEV_TMR_CTRL: |
204 pitimer.writeControl(pkt->get | 205 pitimer.writeControl(pkt->getLE<uint8_t>()); |
205 break; 206 case TSDEV_RTC_ADDR: | 206 break; 207 case TSDEV_RTC_ADDR: |
207 rtcAddr = pkt->get | 208 rtcAddr = pkt->getLE<uint8_t>(); |
208 break; 209 case TSDEV_RTC_DATA: | 209 break; 210 case TSDEV_RTC_DATA: |
210 rtc.writeData(rtcAddr, pkt->get | 211 rtc.writeData(rtcAddr, pkt->getLE<uint8_t>()); |
211 break; 212 case TSDEV_KBD: 213 case TSDEV_DMA1_CMND: 214 case TSDEV_DMA2_CMND: 215 case TSDEV_DMA1_MMASK: 216 case TSDEV_DMA2_MMASK: 217 case TSDEV_PIC2_ACK: 218 case TSDEV_DMA1_RESET: 219 case TSDEV_DMA2_RESET: 220 case TSDEV_DMA1_MASK: 221 case TSDEV_DMA2_MASK: 222 case TSDEV_CTRL_PORTB: 223 break; 224 default: | 212 break; 213 case TSDEV_KBD: 214 case TSDEV_DMA1_CMND: 215 case TSDEV_DMA2_CMND: 216 case TSDEV_DMA1_MMASK: 217 case TSDEV_DMA2_MMASK: 218 case TSDEV_PIC2_ACK: 219 case TSDEV_DMA1_RESET: 220 case TSDEV_DMA2_RESET: 221 case TSDEV_DMA1_MASK: 222 case TSDEV_DMA2_MASK: 223 case TSDEV_CTRL_PORTB: 224 break; 225 default: |
225 panic("I/O Write - va%#x size %d data %#x\n", pkt->getAddr(), pkt->getSize(), pkt->get<uint8_t>()); | 226 panic("I/O Write - va%#x size %d data %#x\n", 227 pkt->getAddr(), pkt->getSize(), pkt->getLE<uint8_t>()); |
226 } 227 228 pkt->makeAtomicResponse(); 229 return pioDelay; 230} 231 232void 233TsunamiIO::postPIC(uint8_t bitvector) --- 66 unchanged lines hidden --- | 228 } 229 230 pkt->makeAtomicResponse(); 231 return pioDelay; 232} 233 234void 235TsunamiIO::postPIC(uint8_t bitvector) --- 66 unchanged lines hidden --- |