1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 235 unchanged lines hidden (view full) --- 244 //PIC2 Is not implemented, because nothing of interest there 245 picr &= ~bitvector; 246 if (!(picr & mask1)) { 247 tsunami->cchip->clearDRIR(55); 248 DPRINTF(Tsunami, "clearing pic interrupt to cchip\n"); 249 } 250} 251 |
252void 253TsunamiIO::serialize(ostream &os) 254{ 255 SERIALIZE_SCALAR(rtcAddr); 256 SERIALIZE_SCALAR(timerData); 257 SERIALIZE_SCALAR(mask1); 258 SERIALIZE_SCALAR(mask2); 259 SERIALIZE_SCALAR(mode1); --- 31 unchanged lines hidden --- |