1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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126 void clearITI(uint64_t itintr);
127
128 /**
129 * request an interrupt be posted to the CPU.
130 * @param ipreq the cpu number to interrupt(bitvector)
131 */
132 void reqIPI(uint64_t ipreq);
133
134 void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
135 void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
136};
137
138#endif // __TSUNAMI_CCHIP_HH__