tsunami_cchip.cc (5570:13592d41f290) tsunami_cchip.cc (5714:76abee886def)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 96 unchanged lines hidden (view full) ---

105 case TSDEV_CC_CSR:
106 pkt->set(0x0);
107 break;
108 case TSDEV_CC_MTR:
109 panic("TSDEV_CC_MTR not implemeted\n");
110 break;
111 case TSDEV_CC_MISC:
112 pkt->set(((ipint << 8) & 0xF) | ((itint << 4) & 0xF) |
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 96 unchanged lines hidden (view full) ---

105 case TSDEV_CC_CSR:
106 pkt->set(0x0);
107 break;
108 case TSDEV_CC_MTR:
109 panic("TSDEV_CC_MTR not implemeted\n");
110 break;
111 case TSDEV_CC_MISC:
112 pkt->set(((ipint << 8) & 0xF) | ((itint << 4) & 0xF) |
113 (pkt->req->getCpuNum() & 0x3));
113 (pkt->req->contextId() & 0x3));
114 // currently, FS cannot handle MT so contextId and
115 // cpuId are effectively the same, don't know if it will
116 // matter if FS becomes MT enabled. I suspect no because
117 // we are currently able to boot up to 64 procs anyway
118 // which would render the CPUID of this register useless
119 // anyway
114 break;
115 case TSDEV_CC_AAR0:
116 case TSDEV_CC_AAR1:
117 case TSDEV_CC_AAR2:
118 case TSDEV_CC_AAR3:
119 pkt->set(0);
120 break;
121 case TSDEV_CC_DIM0:

--- 407 unchanged lines hidden --- 		120 break;
121 case TSDEV_CC_AAR0:
122 case TSDEV_CC_AAR1:
123 case TSDEV_CC_AAR2:
124 case TSDEV_CC_AAR3:
125 pkt->set(0);
126 break;
127 case TSDEV_CC_DIM0:

--- 407 unchanged lines hidden ---