tsunami_cchip.cc (4918:3214e3694fb2) tsunami_cchip.cc (5570:13592d41f290)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 95 unchanged lines hidden (view full) ---

104 switch(regnum) {
105 case TSDEV_CC_CSR:
106 pkt->set(0x0);
107 break;
108 case TSDEV_CC_MTR:
109 panic("TSDEV_CC_MTR not implemeted\n");
110 break;
111 case TSDEV_CC_MISC:
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 95 unchanged lines hidden (view full) ---

104 switch(regnum) {
105 case TSDEV_CC_CSR:
106 pkt->set(0x0);
107 break;
108 case TSDEV_CC_MTR:
109 panic("TSDEV_CC_MTR not implemeted\n");
110 break;
111 case TSDEV_CC_MISC:
112 pkt->set((ipint << 8) & 0xF | (itint << 4) & 0xF |
112 pkt->set(((ipint << 8) & 0xF) | ((itint << 4) & 0xF) |
113 (pkt->req->getCpuNum() & 0x3));
114 break;
115 case TSDEV_CC_AAR0:
116 case TSDEV_CC_AAR1:
117 case TSDEV_CC_AAR2:
118 case TSDEV_CC_AAR3:
119 pkt->set(0);
120 break;

--- 408 unchanged lines hidden --- 		113 (pkt->req->getCpuNum() & 0x3));
114 break;
115 case TSDEV_CC_AAR0:
116 case TSDEV_CC_AAR1:
117 case TSDEV_CC_AAR2:
118 case TSDEV_CC_AAR3:
119 pkt->set(0);
120 break;

--- 408 unchanged lines hidden ---