1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 66 unchanged lines hidden (view full) --- 75 * The pchip is the interface to the PCI bus, in our case 76 * it does not have to do much. 77 */ 78 TsunamiPChip *pchip; 79 80 int intr_sum_type[Tsunami::Max_CPUs]; 81 int ipi_pending[Tsunami::Max_CPUs]; 82 |
83 void init(); 84 |
85 public: 86 typedef TsunamiParams Params; 87 Tsunami(const Params *p); 88 89 /** |
90 * Cause the cpu to post a serial interrupt to the CPU. 91 */ 92 virtual void postConsoleInt(); 93 94 /** 95 * Clear a posted CPU interrupt (id=55) 96 */ 97 virtual void clearConsoleInt(); --- 44 unchanged lines hidden --- |