Tsunami.py (4486:aaeb03a8a6e1) | Tsunami.py (5478:ca055528a3b3) |
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1# Copyright (c) 2005-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 73 unchanged lines hidden (view full) --- 82 fake_pnp_read7 = IsaFake(pio_addr=0x801fc0003c3) 83 84 fake_ata0 = IsaFake(pio_addr=0x801fc0001f0) 85 fake_ata1 = IsaFake(pio_addr=0x801fc000170) 86 87 fb = BadDevice(pio_addr=0x801fc0003d0, devicename='FrameBuffer') 88 io = TsunamiIO(pio_addr=0x801fc000000) 89 uart = Uart8250(pio_addr=0x801fc0003f8) | 1# Copyright (c) 2005-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 73 unchanged lines hidden (view full) --- 82 fake_pnp_read7 = IsaFake(pio_addr=0x801fc0003c3) 83 84 fake_ata0 = IsaFake(pio_addr=0x801fc0001f0) 85 fake_ata1 = IsaFake(pio_addr=0x801fc000170) 86 87 fb = BadDevice(pio_addr=0x801fc0003d0, devicename='FrameBuffer') 88 io = TsunamiIO(pio_addr=0x801fc000000) 89 uart = Uart8250(pio_addr=0x801fc0003f8) |
90 console = AlphaConsole(pio_addr=0x80200000000, disk=Parent.simple_disk) | 90 alpha_console = AlphaConsole(pio_addr=0x80200000000, 91 disk=Parent.simple_disk) |
91 92 # Attach I/O devices to specified bus object. Can't do this 93 # earlier, since the bus object itself is typically defined at the 94 # System level. 95 def attachIO(self, bus): 96 self.cchip.pio = bus.port 97 self.pchip.pio = bus.port 98 self.pciconfig.pio = bus.default --- 16 unchanged lines hidden (view full) --- 115 self.fake_pnp_read5.pio = bus.port 116 self.fake_pnp_read6.pio = bus.port 117 self.fake_pnp_read7.pio = bus.port 118 self.fake_ata0.pio = bus.port 119 self.fake_ata1.pio = bus.port 120 self.fb.pio = bus.port 121 self.io.pio = bus.port 122 self.uart.pio = bus.port | 92 93 # Attach I/O devices to specified bus object. Can't do this 94 # earlier, since the bus object itself is typically defined at the 95 # System level. 96 def attachIO(self, bus): 97 self.cchip.pio = bus.port 98 self.pchip.pio = bus.port 99 self.pciconfig.pio = bus.default --- 16 unchanged lines hidden (view full) --- 116 self.fake_pnp_read5.pio = bus.port 117 self.fake_pnp_read6.pio = bus.port 118 self.fake_pnp_read7.pio = bus.port 119 self.fake_ata0.pio = bus.port 120 self.fake_ata1.pio = bus.port 121 self.fb.pio = bus.port 122 self.io.pio = bus.port 123 self.uart.pio = bus.port |
123 self.console.pio = bus.port | 124 self.alpha_console.pio = bus.port |