SConscript (11244:a2af58a06c4e) SConscript (11260:bedcc64f6145)
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 31 unchanged lines hidden (view full) ---

40 Return()
41
42SimObject('BadDevice.py')
43SimObject('CopyEngine.py')
44SimObject('DiskImage.py')
45SimObject('Ethernet.py')
46SimObject('I2C.py')
47SimObject('Ide.py')
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 31 unchanged lines hidden (view full) ---

40 Return()
41
42SimObject('BadDevice.py')
43SimObject('CopyEngine.py')
44SimObject('DiskImage.py')
45SimObject('Ethernet.py')
46SimObject('I2C.py')
47SimObject('Ide.py')
48SimObject('Pci.py')
49SimObject('Platform.py')
50SimObject('SimpleDisk.py')
51SimObject('Terminal.py')
52SimObject('Uart.py')
53
54Source('baddev.cc')
55Source('copy_engine.cc')
56Source('disk_image.cc')

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68Source('ethertap.cc')
69Source('i2cbus.cc')
70Source('i8254xGBe.cc')
71Source('ide_ctrl.cc')
72Source('ide_disk.cc')
73Source('intel_8254_timer.cc')
74Source('mc146818.cc')
75Source('ns_gige.cc')
48SimObject('Platform.py')
49SimObject('SimpleDisk.py')
50SimObject('Terminal.py')
51SimObject('Uart.py')
52
53Source('baddev.cc')
54Source('copy_engine.cc')
55Source('disk_image.cc')

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67Source('ethertap.cc')
68Source('i2cbus.cc')
69Source('i8254xGBe.cc')
70Source('ide_ctrl.cc')
71Source('ide_disk.cc')
72Source('intel_8254_timer.cc')
73Source('mc146818.cc')
74Source('ns_gige.cc')
76Source('pcidev.cc')
77Source('pixelpump.cc')
78Source('pktfifo.cc')
79Source('platform.cc')
80Source('ps2.cc')
81Source('simple_disk.cc')
82Source('sinic.cc')
83Source('terminal.cc')
84Source('uart.cc')

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98DebugFlag('EthernetEEPROM')
99DebugFlag('EthernetIntr')
100DebugFlag('EthernetPIO')
101DebugFlag('EthernetSM')
102DebugFlag('IdeCtrl')
103DebugFlag('IdeDisk')
104DebugFlag('Intel8254Timer')
105DebugFlag('MC146818')
75Source('pixelpump.cc')
76Source('pktfifo.cc')
77Source('platform.cc')
78Source('ps2.cc')
79Source('simple_disk.cc')
80Source('sinic.cc')
81Source('terminal.cc')
82Source('uart.cc')

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96DebugFlag('EthernetEEPROM')
97DebugFlag('EthernetIntr')
98DebugFlag('EthernetPIO')
99DebugFlag('EthernetSM')
100DebugFlag('IdeCtrl')
101DebugFlag('IdeDisk')
102DebugFlag('Intel8254Timer')
103DebugFlag('MC146818')
106DebugFlag('PCIDEV')
107DebugFlag('SimpleDisk')
108DebugFlag('SimpleDiskData')
109DebugFlag('Terminal')
110DebugFlag('TerminalVerbose')
111DebugFlag('Uart')
112
113CompoundFlag('DiskImageAll', [ 'DiskImageRead', 'DiskImageWrite' ])
114CompoundFlag('EthernetAll', [ 'Ethernet', 'EthernetPIO', 'EthernetDMA',
115 'EthernetData' , 'EthernetDesc', 'EthernetIntr', 'EthernetSM',
116 'EthernetCksum', 'EthernetEEPROM' ])
117CompoundFlag('EthernetNoData', [ 'Ethernet', 'EthernetPIO', 'EthernetDesc',
118 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ])
119CompoundFlag('IdeAll', [ 'IdeCtrl', 'IdeDisk' ])
104DebugFlag('SimpleDisk')
105DebugFlag('SimpleDiskData')
106DebugFlag('Terminal')
107DebugFlag('TerminalVerbose')
108DebugFlag('Uart')
109
110CompoundFlag('DiskImageAll', [ 'DiskImageRead', 'DiskImageWrite' ])
111CompoundFlag('EthernetAll', [ 'Ethernet', 'EthernetPIO', 'EthernetDMA',
112 'EthernetData' , 'EthernetDesc', 'EthernetIntr', 'EthernetSM',
113 'EthernetCksum', 'EthernetEEPROM' ])
114CompoundFlag('EthernetNoData', [ 'Ethernet', 'EthernetPIO', 'EthernetDesc',
115 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ])
116CompoundFlag('IdeAll', [ 'IdeCtrl', 'IdeDisk' ])