trace_cpu.cc (11918:38a88569ba4d) trace_cpu.cc (12085:de78ea63e0ca)
1/*
2 * Copyright (c) 2013 - 2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 43 unchanged lines hidden (view full) ---

52 dcachePort(this),
53 instMasterID(params->system->getMasterId(name() + ".inst")),
54 dataMasterID(params->system->getMasterId(name() + ".data")),
55 instTraceFile(params->instTraceFile),
56 dataTraceFile(params->dataTraceFile),
57 icacheGen(*this, ".iside", icachePort, instMasterID, instTraceFile),
58 dcacheGen(*this, ".dside", dcachePort, dataMasterID, dataTraceFile,
59 params),
1/*
2 * Copyright (c) 2013 - 2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 43 unchanged lines hidden (view full) ---

52 dcachePort(this),
53 instMasterID(params->system->getMasterId(name() + ".inst")),
54 dataMasterID(params->system->getMasterId(name() + ".data")),
55 instTraceFile(params->instTraceFile),
56 dataTraceFile(params->dataTraceFile),
57 icacheGen(*this, ".iside", icachePort, instMasterID, instTraceFile),
58 dcacheGen(*this, ".dside", dcachePort, dataMasterID, dataTraceFile,
59 params),
60 icacheNextEvent(this),
61 dcacheNextEvent(this),
60 icacheNextEvent([this]{ schedIcacheNext(); }, name()),
61 dcacheNextEvent([this]{ schedDcacheNext(); }, name()),
62 oneTraceComplete(false),
63 traceOffset(0),
64 execCompleteEvent(nullptr),
65 enableEarlyExit(params->enableEarlyExit),
66 progressMsgInterval(params->progressMsgInterval),
67 progressMsgThreshold(params->progressMsgInterval)
68{
69 // Increment static counter for number of Trace CPUs.

--- 1450 unchanged lines hidden --- 		62 oneTraceComplete(false),
63 traceOffset(0),
64 execCompleteEvent(nullptr),
65 enableEarlyExit(params->enableEarlyExit),
66 progressMsgInterval(params->progressMsgInterval),
67 progressMsgThreshold(params->progressMsgInterval)
68{
69 // Increment static counter for number of Trace CPUs.

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