thread_state.hh (6658:f4de76601762) thread_state.hh (7679:f26cc2c68b48)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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117#else
118 Process *getProcessPtr() { return process; }
119
120 TranslatingPort *getMemPort();
121
122 void setMemPort(TranslatingPort *_port) { port = _port; }
123#endif
124
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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117#else
118 Process *getProcessPtr() { return process; }
119
120 TranslatingPort *getMemPort();
121
122 void setMemPort(TranslatingPort *_port) { port = _port; }
123#endif
124
125 /** Sets the current instruction being committed. */
126 void setInst(TheISA::MachInst _inst) { inst = _inst; }
127
128 /** Returns the current instruction being committed. */
129 TheISA::MachInst getInst() { return inst; }
130
131 /** Reads the number of instructions functionally executed and
132 * committed.
133 */
134 Counter readFuncExeInst() { return funcExeInst; }
135
136 /** Sets the total number of instructions functionally executed
137 * and committed.
138 */

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200 * addresses. */
201 VirtualPort *virtPort;
202#else
203 TranslatingPort *port;
204
205 Process *process;
206#endif
207
125 /** Reads the number of instructions functionally executed and
126 * committed.
127 */
128 Counter readFuncExeInst() { return funcExeInst; }
129
130 /** Sets the total number of instructions functionally executed
131 * and committed.
132 */

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194 * addresses. */
195 VirtualPort *virtPort;
196#else
197 TranslatingPort *port;
198
199 Process *process;
200#endif
201
208 /** Current instruction the thread is committing. Only set and
209 * used for DTB faults currently.
210 */
211 TheISA::MachInst inst;
212
213 public:
214 /**
215 * Temporary storage to pass the source address from copy_load to
216 * copy_store.
217 * @todo Remove this temporary when we have a better way to do it.
218 */
219 Addr copySrcAddr;
220 /**

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203 /**
204 * Temporary storage to pass the source address from copy_load to
205 * copy_store.
206 * @todo Remove this temporary when we have a better way to do it.
207 */
208 Addr copySrcAddr;
209 /**

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