thread_state.hh (6324:a535b2232c08) thread_state.hh (6331:d947798df4a1)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 54 unchanged lines hidden (view full) ---

63 * to hold more thread-specific stats within it.
64 */
65struct ThreadState {
66 typedef ThreadContext::Status Status;
67
68#if FULL_SYSTEM
69 ThreadState(BaseCPU *cpu, ThreadID _tid);
70#else
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 54 unchanged lines hidden (view full) ---

63 * to hold more thread-specific stats within it.
64 */
65struct ThreadState {
66 typedef ThreadContext::Status Status;
67
68#if FULL_SYSTEM
69 ThreadState(BaseCPU *cpu, ThreadID _tid);
70#else
71 ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process, short _asid);
71 ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process);
72#endif
73
74 ~ThreadState();
75
76 void serialize(std::ostream &os);
77
78 void unserialize(Checkpoint *cp, const std::string &section);
79

--- 34 unchanged lines hidden (view full) ---

114
115 VirtualPort *getVirtPort() { return virtPort; }
116#else
117 Process *getProcessPtr() { return process; }
118
119 TranslatingPort *getMemPort();
120
121 void setMemPort(TranslatingPort *_port) { port = _port; }
72#endif
73
74 ~ThreadState();
75
76 void serialize(std::ostream &os);
77
78 void unserialize(Checkpoint *cp, const std::string &section);
79

--- 34 unchanged lines hidden (view full) ---

114
115 VirtualPort *getVirtPort() { return virtPort; }
116#else
117 Process *getProcessPtr() { return process; }
118
119 TranslatingPort *getMemPort();
120
121 void setMemPort(TranslatingPort *_port) { port = _port; }
122
123 int getInstAsid() { return asid; }
124 int getDataAsid() { return asid; }
125#endif
126
127 /** Sets the current instruction being committed. */
128 void setInst(TheISA::MachInst _inst) { inst = _inst; }
129
130 /** Returns the current instruction being committed. */
131 TheISA::MachInst getInst() { return inst; }
132

--- 67 unchanged lines hidden (view full) ---

200
201 /** A functional port, outgoing only, for functional accesse to virtual
202 * addresses. */
203 VirtualPort *virtPort;
204#else
205 TranslatingPort *port;
206
207 Process *process;
122#endif
123
124 /** Sets the current instruction being committed. */
125 void setInst(TheISA::MachInst _inst) { inst = _inst; }
126
127 /** Returns the current instruction being committed. */
128 TheISA::MachInst getInst() { return inst; }
129

--- 67 unchanged lines hidden (view full) ---

197
198 /** A functional port, outgoing only, for functional accesse to virtual
199 * addresses. */
200 VirtualPort *virtPort;
201#else
202 TranslatingPort *port;
203
204 Process *process;
208
209 // Address space ID. Note that this is used for TIMING cache
210 // simulation only; all functional memory accesses should use
211 // one of the FunctionalMemory pointers above.
212 short asid;
213
214#endif
215
216 /** Current instruction the thread is committing. Only set and
217 * used for DTB faults currently.
218 */
219 TheISA::MachInst inst;
220
221 public:

--- 25 unchanged lines hidden --- 		205#endif
206
207 /** Current instruction the thread is committing. Only set and
208 * used for DTB faults currently.
209 */
210 TheISA::MachInst inst;
211
212 public:

--- 25 unchanged lines hidden ---