thread_state.hh (3125:febd811bccc6) thread_state.hh (3126:756092c6383c)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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190
191 // Address space ID. Note that this is used for TIMING cache
192 // simulation only; all functional memory accesses should use
193 // one of the FunctionalMemory pointers above.
194 short asid;
195
196#endif
197
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 181 unchanged lines hidden (view full) ---

190
191 // Address space ID. Note that this is used for TIMING cache
192 // simulation only; all functional memory accesses should use
193 // one of the FunctionalMemory pointers above.
194 short asid;
195
196#endif
197
198#if FULL_SYSTEM
199 void profileClear()
200 {
201 if (profile)
202 profile->clear();
203 }
204
205 void profileSample()
206 {
207 if (profile)
208 profile->sample(profileNode, profilePC);
209 }
210#endif
211
212 /** Current instruction the thread is committing. Only set and
213 * used for DTB faults currently.
214 */
215 TheISA::MachInst inst;
216
217 public:
218 /**
219 * Temporary storage to pass the source address from copy_load to

--- 23 unchanged lines hidden --- 		198 /** Current instruction the thread is committing. Only set and
199 * used for DTB faults currently.
200 */
201 TheISA::MachInst inst;
202
203 public:
204 /**
205 * Temporary storage to pass the source address from copy_load to

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