1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#ifndef __CPU_THREAD_STATE_HH__
32#define __CPU_THREAD_STATE_HH__
33
34#include "arch/types.hh"
35#include "config/the_isa.hh"
36#include "cpu/base.hh"
37#include "cpu/profile.hh"
38#include "cpu/thread_context.hh"
39#include "mem/mem_object.hh"
40#include "sim/process.hh"
41
42#if FULL_SYSTEM
43class EndQuiesceEvent;
44class FunctionProfile;
45class ProfileNode;
46namespace TheISA {
47 namespace Kernel {
48 class Statistics;
49 };
50};
51#endif
52
53class Checkpoint;
54class Port;
55class TranslatingPort;
56
57/**
58 * Struct for holding general thread state that is needed across CPU
59 * models. This includes things such as pointers to the process,
60 * memory, quiesce events, and certain stats. This can be expanded
61 * to hold more thread-specific stats within it.
62 */
63struct ThreadState {
64 typedef ThreadContext::Status Status;
65
66 ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process);
67
68 ~ThreadState();
69
70 void serialize(std::ostream &os);
71
72 void unserialize(Checkpoint *cp, const std::string §ion);
73
74 int cpuId() { return baseCpu->cpuId(); }
75
76 int contextId() { return _contextId; }
77
78 void setContextId(int id) { _contextId = id; }
79
80 void setThreadId(ThreadID id) { _threadId = id; }
81
82 ThreadID threadId() { return _threadId; }
83
84 Tick readLastActivate() { return lastActivate; }
85
86 Tick readLastSuspend() { return lastSuspend; }
87
88 void connectPhysPort();
89
90 void connectVirtPort(ThreadContext *tc);
91
92#if FULL_SYSTEM
93 void connectMemPorts(ThreadContext *tc);
94
95 void dumpFuncProfile();
96
97 EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; }
98
99 void profileClear();
100
101 void profileSample();
102
103 TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; }
| 1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#ifndef __CPU_THREAD_STATE_HH__
32#define __CPU_THREAD_STATE_HH__
33
34#include "arch/types.hh"
35#include "config/the_isa.hh"
36#include "cpu/base.hh"
37#include "cpu/profile.hh"
38#include "cpu/thread_context.hh"
39#include "mem/mem_object.hh"
40#include "sim/process.hh"
41
42#if FULL_SYSTEM
43class EndQuiesceEvent;
44class FunctionProfile;
45class ProfileNode;
46namespace TheISA {
47 namespace Kernel {
48 class Statistics;
49 };
50};
51#endif
52
53class Checkpoint;
54class Port;
55class TranslatingPort;
56
57/**
58 * Struct for holding general thread state that is needed across CPU
59 * models. This includes things such as pointers to the process,
60 * memory, quiesce events, and certain stats. This can be expanded
61 * to hold more thread-specific stats within it.
62 */
63struct ThreadState {
64 typedef ThreadContext::Status Status;
65
66 ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process);
67
68 ~ThreadState();
69
70 void serialize(std::ostream &os);
71
72 void unserialize(Checkpoint *cp, const std::string §ion);
73
74 int cpuId() { return baseCpu->cpuId(); }
75
76 int contextId() { return _contextId; }
77
78 void setContextId(int id) { _contextId = id; }
79
80 void setThreadId(ThreadID id) { _threadId = id; }
81
82 ThreadID threadId() { return _threadId; }
83
84 Tick readLastActivate() { return lastActivate; }
85
86 Tick readLastSuspend() { return lastSuspend; }
87
88 void connectPhysPort();
89
90 void connectVirtPort(ThreadContext *tc);
91
92#if FULL_SYSTEM
93 void connectMemPorts(ThreadContext *tc);
94
95 void dumpFuncProfile();
96
97 EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; }
98
99 void profileClear();
100
101 void profileSample();
102
103 TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; }
|
107
108 TranslatingPort *getMemPort();
109
110 void setMemPort(TranslatingPort *_port) { port = _port; }
111
112 VirtualPort *getVirtPort() { return virtPort; }
113
114 FunctionalPort *getPhysPort() { return physPort; }
115
116 void setPhysPort(FunctionalPort *port) { physPort = port; }
117
118 /** Reads the number of instructions functionally executed and
119 * committed.
120 */
121 Counter readFuncExeInst() { return funcExeInst; }
122
123 /** Sets the total number of instructions functionally executed
124 * and committed.
125 */
126 void setFuncExeInst(Counter new_val) { funcExeInst = new_val; }
127
128 /** Returns the status of this thread. */
129 Status status() const { return _status; }
130
131 /** Sets the status of this thread. */
132 void setStatus(Status new_status) { _status = new_status; }
133
134 public:
135 /** Connects port to the functional port of the memory object
136 * below the CPU. */
137 void connectToMemFunc(Port *port);
138
139 /** Number of instructions committed. */
140 Counter numInst;
141 /** Stat for number instructions committed. */
142 Stats::Scalar numInsts;
143 /** Stat for number of memory references. */
144 Stats::Scalar numMemRefs;
145
146 /** Number of simulated loads, used for tracking events based on
147 * the number of loads committed.
148 */
149 Counter numLoad;
150
151 /** The number of simulated loads committed prior to this run. */
152 Counter startNumLoad;
153
154 protected:
155 ThreadContext::Status _status;
156
157 // Pointer to the base CPU.
158 BaseCPU *baseCpu;
159
160 // system wide HW context id
161 int _contextId;
162
163 // Index of hardware thread context on the CPU that this represents.
164 ThreadID _threadId;
165
166 public:
167 /** Last time activate was called on this thread. */
168 Tick lastActivate;
169
170 /** Last time suspend was called on this thread. */
171 Tick lastSuspend;
172
173#if FULL_SYSTEM
174 public:
175 FunctionProfile *profile;
176 ProfileNode *profileNode;
177 Addr profilePC;
178 EndQuiesceEvent *quiesceEvent;
179
180 TheISA::Kernel::Statistics *kernelStats;
181#endif
182 protected:
183 Process *process;
184
185 TranslatingPort *port;
186
187 /** A functional port, outgoing only, for functional accesse to virtual
188 * addresses. */
189 VirtualPort *virtPort;
190
191 /** A functional port outgoing only for functional accesses to physical
192 * addresses.*/
193 FunctionalPort *physPort;
194
195 public:
196 /*
197 * number of executed instructions, for matching with syscall trace
198 * points in EIO files.
199 */
200 Counter funcExeInst;
201
202 //
203 // Count failed store conditionals so we can warn of apparent
204 // application deadlock situations.
205 unsigned storeCondFailures;
206};
207
208#endif // __CPU_THREAD_STATE_HH__
| 106
107 TranslatingPort *getMemPort();
108
109 void setMemPort(TranslatingPort *_port) { port = _port; }
110
111 VirtualPort *getVirtPort() { return virtPort; }
112
113 FunctionalPort *getPhysPort() { return physPort; }
114
115 void setPhysPort(FunctionalPort *port) { physPort = port; }
116
117 /** Reads the number of instructions functionally executed and
118 * committed.
119 */
120 Counter readFuncExeInst() { return funcExeInst; }
121
122 /** Sets the total number of instructions functionally executed
123 * and committed.
124 */
125 void setFuncExeInst(Counter new_val) { funcExeInst = new_val; }
126
127 /** Returns the status of this thread. */
128 Status status() const { return _status; }
129
130 /** Sets the status of this thread. */
131 void setStatus(Status new_status) { _status = new_status; }
132
133 public:
134 /** Connects port to the functional port of the memory object
135 * below the CPU. */
136 void connectToMemFunc(Port *port);
137
138 /** Number of instructions committed. */
139 Counter numInst;
140 /** Stat for number instructions committed. */
141 Stats::Scalar numInsts;
142 /** Stat for number of memory references. */
143 Stats::Scalar numMemRefs;
144
145 /** Number of simulated loads, used for tracking events based on
146 * the number of loads committed.
147 */
148 Counter numLoad;
149
150 /** The number of simulated loads committed prior to this run. */
151 Counter startNumLoad;
152
153 protected:
154 ThreadContext::Status _status;
155
156 // Pointer to the base CPU.
157 BaseCPU *baseCpu;
158
159 // system wide HW context id
160 int _contextId;
161
162 // Index of hardware thread context on the CPU that this represents.
163 ThreadID _threadId;
164
165 public:
166 /** Last time activate was called on this thread. */
167 Tick lastActivate;
168
169 /** Last time suspend was called on this thread. */
170 Tick lastSuspend;
171
172#if FULL_SYSTEM
173 public:
174 FunctionProfile *profile;
175 ProfileNode *profileNode;
176 Addr profilePC;
177 EndQuiesceEvent *quiesceEvent;
178
179 TheISA::Kernel::Statistics *kernelStats;
180#endif
181 protected:
182 Process *process;
183
184 TranslatingPort *port;
185
186 /** A functional port, outgoing only, for functional accesse to virtual
187 * addresses. */
188 VirtualPort *virtPort;
189
190 /** A functional port outgoing only for functional accesses to physical
191 * addresses.*/
192 FunctionalPort *physPort;
193
194 public:
195 /*
196 * number of executed instructions, for matching with syscall trace
197 * points in EIO files.
198 */
199 Counter funcExeInst;
200
201 //
202 // Count failed store conditionals so we can warn of apparent
203 // application deadlock situations.
204 unsigned storeCondFailures;
205};
206
207#endif // __CPU_THREAD_STATE_HH__
|