thread_state.cc (8777:dd43f1c9fa0a) thread_state.cc (8793:5f25086326ac)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 14 unchanged lines hidden (view full) ---

23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#include "arch/kernel_stats.hh"
31#include "base/output.hh"
32#include "cpu/base.hh"
33#include "cpu/profile.hh"
32#include "base/output.hh"
33#include "cpu/base.hh"
34#include "cpu/profile.hh"
35#include "cpu/quiesce_event.hh"
34#include "cpu/thread_state.hh"
35#include "mem/port.hh"
36#include "mem/translating_port.hh"
37#include "mem/vport.hh"
36#include "cpu/thread_state.hh"
37#include "mem/port.hh"
38#include "mem/translating_port.hh"
39#include "mem/vport.hh"
40#include "sim/full_system.hh"
38#include "sim/serialize.hh"
39
41#include "sim/serialize.hh"
42
40#if FULL_SYSTEM
41#include "arch/kernel_stats.hh"
42#include "cpu/quiesce_event.hh"
43#endif
44
45ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process)
46 : numInst(0), numLoad(0), _status(ThreadContext::Halted),
47 baseCpu(cpu), _threadId(_tid), lastActivate(0), lastSuspend(0),
43ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process)
44 : numInst(0), numLoad(0), _status(ThreadContext::Halted),
45 baseCpu(cpu), _threadId(_tid), lastActivate(0), lastSuspend(0),
48#if FULL_SYSTEM
49 profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL),
46 profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL),
50 kernelStats(NULL),
51#endif
52 process(_process), port(NULL), virtPort(NULL), physPort(NULL),
53 funcExeInst(0), storeCondFailures(0)
47 kernelStats(NULL), process(_process), port(NULL), virtPort(NULL),
48 physPort(NULL), funcExeInst(0), storeCondFailures(0)
54{
55}
56
57ThreadState::~ThreadState()
58{
59 if (port) {
60 delete port->getPeer();
61 delete port;
62 }
63}
64
65void
66ThreadState::serialize(std::ostream &os)
67{
68 SERIALIZE_ENUM(_status);
69 // thread_num and cpu_id are deterministic from the config
70 SERIALIZE_SCALAR(funcExeInst);
71
49{
50}
51
52ThreadState::~ThreadState()
53{
54 if (port) {
55 delete port->getPeer();
56 delete port;
57 }
58}
59
60void
61ThreadState::serialize(std::ostream &os)
62{
63 SERIALIZE_ENUM(_status);
64 // thread_num and cpu_id are deterministic from the config
65 SERIALIZE_SCALAR(funcExeInst);
66
72#if FULL_SYSTEM
73 Tick quiesceEndTick = 0;
74 if (quiesceEvent->scheduled())
75 quiesceEndTick = quiesceEvent->when();
76 SERIALIZE_SCALAR(quiesceEndTick);
77 if (kernelStats)
78 kernelStats->serialize(os);
79#endif
67 if (FullSystem) {
68 Tick quiesceEndTick = 0;
69 if (quiesceEvent->scheduled())
70 quiesceEndTick = quiesceEvent->when();
71 SERIALIZE_SCALAR(quiesceEndTick);
72 if (kernelStats)
73 kernelStats->serialize(os);
74 }
80}
81
82void
83ThreadState::unserialize(Checkpoint *cp, const std::string &section)
84{
85
86 UNSERIALIZE_ENUM(_status);
87 // thread_num and cpu_id are deterministic from the config
88 UNSERIALIZE_SCALAR(funcExeInst);
89
75}
76
77void
78ThreadState::unserialize(Checkpoint *cp, const std::string &section)
79{
80
81 UNSERIALIZE_ENUM(_status);
82 // thread_num and cpu_id are deterministic from the config
83 UNSERIALIZE_SCALAR(funcExeInst);
84
90#if FULL_SYSTEM
91 Tick quiesceEndTick;
92 UNSERIALIZE_SCALAR(quiesceEndTick);
93 if (quiesceEndTick)
94 baseCpu->schedule(quiesceEvent, quiesceEndTick);
95 if (kernelStats)
96 kernelStats->unserialize(cp, section);
97#endif
85 if (FullSystem) {
86 Tick quiesceEndTick;
87 UNSERIALIZE_SCALAR(quiesceEndTick);
88 if (quiesceEndTick)
89 baseCpu->schedule(quiesceEvent, quiesceEndTick);
90 if (kernelStats)
91 kernelStats->unserialize(cp, section);
92 }
98}
99
100void
101ThreadState::connectPhysPort()
102{
103 // @todo: For now this disregards any older port that may have
104 // already existed. Fix this memory leak once the bus port IDs
105 // for functional ports is resolved.

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94
95void
96ThreadState::connectPhysPort()
97{
98 // @todo: For now this disregards any older port that may have
99 // already existed. Fix this memory leak once the bus port IDs
100 // for functional ports is resolved.

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