thread_state.cc (5606:6da7a58b0bc8) thread_state.cc (5712:199d31b47f7b)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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38
39#if FULL_SYSTEM
40#include "arch/kernel_stats.hh"
41#include "cpu/quiesce_event.hh"
42#include "mem/vport.hh"
43#endif
44
45#if FULL_SYSTEM
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 29 unchanged lines hidden (view full) ---

38
39#if FULL_SYSTEM
40#include "arch/kernel_stats.hh"
41#include "cpu/quiesce_event.hh"
42#include "mem/vport.hh"
43#endif
44
45#if FULL_SYSTEM
46ThreadState::ThreadState(BaseCPU *cpu, int _cpuId, int _tid)
47 : baseCpu(cpu), cpuId(_cpuId), tid(_tid), lastActivate(0), lastSuspend(0),
46ThreadState::ThreadState(BaseCPU *cpu, int _tid)
47 : baseCpu(cpu), tid(_tid), lastActivate(0), lastSuspend(0),
48 profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL),
49 kernelStats(NULL), physPort(NULL), virtPort(NULL),
50 microPC(0), nextMicroPC(1), funcExeInst(0), storeCondFailures(0)
51#else
48 profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL),
49 kernelStats(NULL), physPort(NULL), virtPort(NULL),
50 microPC(0), nextMicroPC(1), funcExeInst(0), storeCondFailures(0)
51#else
52ThreadState::ThreadState(BaseCPU *cpu, int _cpuId, int _tid, Process *_process,
52ThreadState::ThreadState(BaseCPU *cpu, int _tid, Process *_process,
53 short _asid)
53 short _asid)
54 : baseCpu(cpu), cpuId(_cpuId), tid(_tid), lastActivate(0), lastSuspend(0),
54 : baseCpu(cpu), tid(_tid), lastActivate(0), lastSuspend(0),
55 port(NULL), process(_process), asid(_asid),
56 microPC(0), nextMicroPC(1), funcExeInst(0), storeCondFailures(0)
57#endif
58{
59 numInst = 0;
60 numLoad = 0;
61}
62

--- 135 unchanged lines hidden --- 		55 port(NULL), process(_process), asid(_asid),
56 microPC(0), nextMicroPC(1), funcExeInst(0), storeCondFailures(0)
57#endif
58{
59 numInst = 0;
60 numLoad = 0;
61}
62

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