1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#include "base/output.hh"
32#include "cpu/profile.hh"
33#include "cpu/thread_state.hh"
34#include "sim/serialize.hh"
35
36#if FULL_SYSTEM
37#include "cpu/quiesce_event.hh"
38#include "kern/kernel_stats.hh"
39#endif
40
41#if FULL_SYSTEM
42ThreadState::ThreadState(int _cpuId, int _tid)
43 : cpuId(_cpuId), tid(_tid), lastActivate(0), lastSuspend(0),
44 profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL),
45 microPC(0), nextMicroPC(1), funcExeInst(0), storeCondFailures(0)
46#else
47ThreadState::ThreadState(int _cpuId, int _tid, Process *_process,
48 short _asid, MemObject *mem)
49 : cpuId(_cpuId), tid(_tid), lastActivate(0), lastSuspend(0),
50 process(_process), asid(_asid),
51 microPC(0), nextMicroPC(1), funcExeInst(0), storeCondFailures(0)
52#endif
53{
54 numInst = 0;
55 numLoad = 0;
56}
57
58void
59ThreadState::serialize(std::ostream &os)
60{
61 SERIALIZE_ENUM(_status);
62 // thread_num and cpu_id are deterministic from the config
63 SERIALIZE_SCALAR(funcExeInst);
64 SERIALIZE_SCALAR(inst);
65 SERIALIZE_SCALAR(microPC);
66 SERIALIZE_SCALAR(nextMicroPC);
67
68#if FULL_SYSTEM
69 Tick quiesceEndTick = 0;
70 if (quiesceEvent->scheduled())
71 quiesceEndTick = quiesceEvent->when();
72 SERIALIZE_SCALAR(quiesceEndTick);
73 if (kernelStats)
74 kernelStats->serialize(os);
75#endif
76}
77
78void
79ThreadState::unserialize(Checkpoint *cp, const std::string &section)
80{
81
82 UNSERIALIZE_ENUM(_status);
83 // thread_num and cpu_id are deterministic from the config
84 UNSERIALIZE_SCALAR(funcExeInst);
85 UNSERIALIZE_SCALAR(inst);
86 UNSERIALIZE_SCALAR(microPC);
87 UNSERIALIZE_SCALAR(nextMicroPC);
88
89#if FULL_SYSTEM
90 Tick quiesceEndTick;
91 UNSERIALIZE_SCALAR(quiesceEndTick);
92 if (quiesceEndTick)
93 quiesceEvent->schedule(quiesceEndTick);
94 if (kernelStats)
95 kernelStats->unserialize(cp, section);
96#endif
97}
98
99#if FULL_SYSTEM
100
101void
102ThreadState::profileClear()
103{
104 if (profile)
105 profile->clear();
106}
107
108void
109ThreadState::profileSample()
110{
111 if (profile)
112 profile->sample(profileNode, profilePC);
113}
114
115#endif