thread_context.hh (7680:f4eda002333b) thread_context.hh (7720:65d338a8dba4)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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187 virtual FloatRegBits readFloatRegBits(int reg_idx) = 0;
188
189 virtual void setIntReg(int reg_idx, uint64_t val) = 0;
190
191 virtual void setFloatReg(int reg_idx, FloatReg val) = 0;
192
193 virtual void setFloatRegBits(int reg_idx, FloatRegBits val) = 0;
194
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 178 unchanged lines hidden (view full) ---

187 virtual FloatRegBits readFloatRegBits(int reg_idx) = 0;
188
189 virtual void setIntReg(int reg_idx, uint64_t val) = 0;
190
191 virtual void setFloatReg(int reg_idx, FloatReg val) = 0;
192
193 virtual void setFloatRegBits(int reg_idx, FloatRegBits val) = 0;
194
195 virtual uint64_t readPC() = 0;
195 virtual TheISA::PCState pcState() = 0;
196
196
197 virtual void setPC(uint64_t val) = 0;
197 virtual void pcState(const TheISA::PCState &val) = 0;
198
198
199 virtual uint64_t readNextPC() = 0;
199 virtual Addr instAddr() = 0;
200
200
201 virtual void setNextPC(uint64_t val) = 0;
201 virtual Addr nextInstAddr() = 0;
202
202
203 virtual uint64_t readNextNPC() = 0;
203 virtual MicroPC microPC() = 0;
204
204
205 virtual void setNextNPC(uint64_t val) = 0;
206
207 virtual uint64_t readMicroPC() = 0;
208
209 virtual void setMicroPC(uint64_t val) = 0;
210
211 virtual uint64_t readNextMicroPC() = 0;
212
213 virtual void setNextMicroPC(uint64_t val) = 0;
214
215 virtual MiscReg readMiscRegNoEffect(int misc_reg) = 0;
216
217 virtual MiscReg readMiscReg(int misc_reg) = 0;
218
219 virtual void setMiscRegNoEffect(int misc_reg, const MiscReg &val) = 0;
220
221 virtual void setMiscReg(int misc_reg, const MiscReg &val) = 0;
222

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372 { actualTC->setIntReg(reg_idx, val); }
373
374 void setFloatReg(int reg_idx, FloatReg val)
375 { actualTC->setFloatReg(reg_idx, val); }
376
377 void setFloatRegBits(int reg_idx, FloatRegBits val)
378 { actualTC->setFloatRegBits(reg_idx, val); }
379
205 virtual MiscReg readMiscRegNoEffect(int misc_reg) = 0;
206
207 virtual MiscReg readMiscReg(int misc_reg) = 0;
208
209 virtual void setMiscRegNoEffect(int misc_reg, const MiscReg &val) = 0;
210
211 virtual void setMiscReg(int misc_reg, const MiscReg &val) = 0;
212

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362 { actualTC->setIntReg(reg_idx, val); }
363
364 void setFloatReg(int reg_idx, FloatReg val)
365 { actualTC->setFloatReg(reg_idx, val); }
366
367 void setFloatRegBits(int reg_idx, FloatRegBits val)
368 { actualTC->setFloatRegBits(reg_idx, val); }
369
380 uint64_t readPC() { return actualTC->readPC(); }
370 TheISA::PCState pcState() { return actualTC->pcState(); }
381
371
382 void setPC(uint64_t val) { actualTC->setPC(val); }
372 void pcState(const TheISA::PCState &val) { actualTC->pcState(val); }
383
373
384 uint64_t readNextPC() { return actualTC->readNextPC(); }
374 Addr instAddr() { return actualTC->instAddr(); }
375 Addr nextInstAddr() { return actualTC->nextInstAddr(); }
376 MicroPC microPC() { return actualTC->microPC(); }
385
377
386 void setNextPC(uint64_t val) { actualTC->setNextPC(val); }
387
388 uint64_t readNextNPC() { return actualTC->readNextNPC(); }
389
390 void setNextNPC(uint64_t val) { actualTC->setNextNPC(val); }
391
392 uint64_t readMicroPC() { return actualTC->readMicroPC(); }
393
394 void setMicroPC(uint64_t val) { actualTC->setMicroPC(val); }
395
396 uint64_t readNextMicroPC() { return actualTC->readMicroPC(); }
397
398 void setNextMicroPC(uint64_t val) { actualTC->setNextMicroPC(val); }
399
400 bool readPredicate() { return actualTC->readPredicate(); }
401
402 void setPredicate(bool val)
403 { actualTC->setPredicate(val); }
404
405 MiscReg readMiscRegNoEffect(int misc_reg)
406 { return actualTC->readMiscRegNoEffect(misc_reg); }
407

--- 33 unchanged lines hidden --- 		378 bool readPredicate() { return actualTC->readPredicate(); }
379
380 void setPredicate(bool val)
381 { actualTC->setPredicate(val); }
382
383 MiscReg readMiscRegNoEffect(int misc_reg)
384 { return actualTC->readMiscRegNoEffect(misc_reg); }
385

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