thread_context.hh (7678:f19b6a3a8cec) | thread_context.hh (7679:f26cc2c68b48) |
---|---|
1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 157 unchanged lines hidden (view full) --- 166 // Having an extra function just to read these is obnoxious 167 virtual Tick readLastActivate() = 0; 168 virtual Tick readLastSuspend() = 0; 169 170 virtual void profileClear() = 0; 171 virtual void profileSample() = 0; 172#endif 173 | 1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 157 unchanged lines hidden (view full) --- 166 // Having an extra function just to read these is obnoxious 167 virtual Tick readLastActivate() = 0; 168 virtual Tick readLastSuspend() = 0; 169 170 virtual void profileClear() = 0; 171 virtual void profileSample() = 0; 172#endif 173 |
174 // Also somewhat obnoxious. Really only used for the TLB fault. 175 // However, may be quite useful in SPARC. 176 virtual TheISA::MachInst getInst() = 0; 177 | |
178 virtual void copyArchRegs(ThreadContext *tc) = 0; 179 180 virtual void clearArchRegs() = 0; 181 182 // 183 // New accessors for new decoder. 184 // 185 virtual uint64_t readIntReg(int reg_idx) = 0; --- 161 unchanged lines hidden (view full) --- 347 EndQuiesceEvent *getQuiesceEvent() { return actualTC->getQuiesceEvent(); } 348 349 Tick readLastActivate() { return actualTC->readLastActivate(); } 350 Tick readLastSuspend() { return actualTC->readLastSuspend(); } 351 352 void profileClear() { return actualTC->profileClear(); } 353 void profileSample() { return actualTC->profileSample(); } 354#endif | 174 virtual void copyArchRegs(ThreadContext *tc) = 0; 175 176 virtual void clearArchRegs() = 0; 177 178 // 179 // New accessors for new decoder. 180 // 181 virtual uint64_t readIntReg(int reg_idx) = 0; --- 161 unchanged lines hidden (view full) --- 343 EndQuiesceEvent *getQuiesceEvent() { return actualTC->getQuiesceEvent(); } 344 345 Tick readLastActivate() { return actualTC->readLastActivate(); } 346 Tick readLastSuspend() { return actualTC->readLastSuspend(); } 347 348 void profileClear() { return actualTC->profileClear(); } 349 void profileSample() { return actualTC->profileSample(); } 350#endif |
355 // @todo: Do I need this? 356 MachInst getInst() { return actualTC->getInst(); } | |
357 358 // @todo: Do I need this? 359 void copyArchRegs(ThreadContext *tc) { actualTC->copyArchRegs(tc); } 360 361 void clearArchRegs() { actualTC->clearArchRegs(); } 362 363 // 364 // New accessors for new decoder. --- 80 unchanged lines hidden --- | 351 352 // @todo: Do I need this? 353 void copyArchRegs(ThreadContext *tc) { actualTC->copyArchRegs(tc); } 354 355 void clearArchRegs() { actualTC->clearArchRegs(); } 356 357 // 358 // New accessors for new decoder. --- 80 unchanged lines hidden --- |