thread_context.hh (6221:58a3c04e6344) | thread_context.hh (6313:95f69a436c82) |
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1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 70 unchanged lines hidden (view full) --- 79class ThreadContext 80{ 81 protected: 82 typedef TheISA::RegFile RegFile; 83 typedef TheISA::MachInst MachInst; 84 typedef TheISA::IntReg IntReg; 85 typedef TheISA::FloatReg FloatReg; 86 typedef TheISA::FloatRegBits FloatRegBits; | 1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 70 unchanged lines hidden (view full) --- 79class ThreadContext 80{ 81 protected: 82 typedef TheISA::RegFile RegFile; 83 typedef TheISA::MachInst MachInst; 84 typedef TheISA::IntReg IntReg; 85 typedef TheISA::FloatReg FloatReg; 86 typedef TheISA::FloatRegBits FloatRegBits; |
87 typedef TheISA::MiscRegFile MiscRegFile; | |
88 typedef TheISA::MiscReg MiscReg; 89 public: 90 91 enum Status 92 { 93 /// Running. Instructions should be executed only when 94 /// the context is in this state. 95 Active, --- 133 unchanged lines hidden (view full) --- 229 virtual MiscReg readMiscRegNoEffect(int misc_reg) = 0; 230 231 virtual MiscReg readMiscReg(int misc_reg) = 0; 232 233 virtual void setMiscRegNoEffect(int misc_reg, const MiscReg &val) = 0; 234 235 virtual void setMiscReg(int misc_reg, const MiscReg &val) = 0; 236 | 87 typedef TheISA::MiscReg MiscReg; 88 public: 89 90 enum Status 91 { 92 /// Running. Instructions should be executed only when 93 /// the context is in this state. 94 Active, --- 133 unchanged lines hidden (view full) --- 228 virtual MiscReg readMiscRegNoEffect(int misc_reg) = 0; 229 230 virtual MiscReg readMiscReg(int misc_reg) = 0; 231 232 virtual void setMiscRegNoEffect(int misc_reg, const MiscReg &val) = 0; 233 234 virtual void setMiscReg(int misc_reg, const MiscReg &val) = 0; 235 |
236 virtual int flattenIntIndex(int reg) = 0; 237 virtual int flattenFloatIndex(int reg) = 0; 238 |
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237 virtual uint64_t 238 readRegOtherThread(int misc_reg, ThreadID tid) 239 { 240 return 0; 241 } 242 243 virtual void 244 setRegOtherThread(int misc_reg, const MiscReg &val, ThreadID tid) --- 184 unchanged lines hidden (view full) --- 429 { return actualTC->readMiscReg(misc_reg); } 430 431 void setMiscRegNoEffect(int misc_reg, const MiscReg &val) 432 { return actualTC->setMiscRegNoEffect(misc_reg, val); } 433 434 void setMiscReg(int misc_reg, const MiscReg &val) 435 { return actualTC->setMiscReg(misc_reg, val); } 436 | 239 virtual uint64_t 240 readRegOtherThread(int misc_reg, ThreadID tid) 241 { 242 return 0; 243 } 244 245 virtual void 246 setRegOtherThread(int misc_reg, const MiscReg &val, ThreadID tid) --- 184 unchanged lines hidden (view full) --- 431 { return actualTC->readMiscReg(misc_reg); } 432 433 void setMiscRegNoEffect(int misc_reg, const MiscReg &val) 434 { return actualTC->setMiscRegNoEffect(misc_reg, val); } 435 436 void setMiscReg(int misc_reg, const MiscReg &val) 437 { return actualTC->setMiscReg(misc_reg, val); } 438 |
439 int flattenIntIndex(int reg) 440 { return actualTC->flattenIntIndex(reg); } 441 442 int flattenFloatIndex(int reg) 443 { return actualTC->flattenFloatIndex(reg); } 444 |
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437 unsigned readStCondFailures() 438 { return actualTC->readStCondFailures(); } 439 440 void setStCondFailures(unsigned sc_failures) 441 { actualTC->setStCondFailures(sc_failures); } 442 443 // @todo: Fix this! 444 bool misspeculating() { return actualTC->misspeculating(); } 445 446#if !FULL_SYSTEM 447 void syscall(int64_t callnum) 448 { actualTC->syscall(callnum); } 449 450 Counter readFuncExeInst() { return actualTC->readFuncExeInst(); } 451#endif 452}; 453 454#endif | 445 unsigned readStCondFailures() 446 { return actualTC->readStCondFailures(); } 447 448 void setStCondFailures(unsigned sc_failures) 449 { actualTC->setStCondFailures(sc_failures); } 450 451 // @todo: Fix this! 452 bool misspeculating() { return actualTC->misspeculating(); } 453 454#if !FULL_SYSTEM 455 void syscall(int64_t callnum) 456 { actualTC->syscall(callnum); } 457 458 Counter readFuncExeInst() { return actualTC->readFuncExeInst(); } 459#endif 460}; 461 462#endif |